Texas Instruments TMS320 User Manual

TMS320 SECOND GENERATION
DIGITAL SIGNAL PROCESSORS
SPRS010B — MAY 1987 — REVISED NOVEMBER 1990
POST OFFICE BOX 1443  HOUSTON, TEXAS 77001
24
MEMORY AND PERIPHERAL INTERFACE TIMING
switching characteristics over recommended operating conditions (see Note 3)
PARAMETER MIN TYP MAX UNIT
t
d(C1-S)
STRB from CLKOUT1 (if STRB is present) Q--15 Q Q+15 ns
t
d(C2-S)
CLKOUT2 to STRB (if STRB is present) -- 1 5 0 15 ns
t
su(A)
Address setup hold time before STRB low(seeNote5) Q--30 ns
t
h(A)
Address hold time after STRB high (see Note 5) Q--15 ns
t
w(SL)
STRB low pulse duration (no wait states, see Note 6) 2Q ns
t
w(SH)
STRB high pulse duration (between consecutive cycles, see Note 6) 2Q ns
t
su(D)W
Data write setup time before STRB high (no wait s tates) 2Q -- 45 ns
t
h(D)W
DatawriteholdtimefromSTRBhigh Q--15 Q ns
t
en(D)
Data bus starts being driven after STRB low (write cycle) 0
†
ns
t
dis(D)
Data bus three-state after STRB high (write cycle) Q Q+30
†
ns
t
d(MSC)
MSC valid from CLKOUT1 -- 2 5 0 25 ns
†
Value derived from characterization data and not tested.
NOTES: 3. Q = 1/4t
c(C)
.
5. A15-A0, PS
,DS,IS,R/W, and BR timings are all included in timings referenced as “address”.
6. Delays between CLKOUT1/CLKOUT2 edges and STRB
edges track each other, resulting in t
w(SL)
and t
w(SH)
being 2Q with
no wait states.
timing requirements over recommended operating conditions (see Note 3)
MIN NOM MAX UNIT
t
a(A)
Read data access time from address time (read cycle, see Notes 5 and 7) 3Q -- 70
†
ns
t
su(D)R
Data read setup time before STRB high 40 ns
t
h(D)R
Data read hold time from S TRB high 0 ns
t
d(SL-R)
READY valid after STRB low (no wait states) Q--40 ns
t
d(C2H-R)
READY valid after CLKOUT2 high Q--40 ns
t
h(SL-R)
READYholdtimeafterSTRBlow (no wait states) Q--5 ns
t
h(C2H-R)
READY hold after CLKOUT2 high Q--5 ns
t
d(M-R)
READY v alid after MSC valid 2Q -- 50 ns
t
h(M-R)
READY hold time after MSC valid 0 ns
†
Value derived from characterization data and not tested.
NOTES: 3. Q = 1/4t
c(C)
.
5. A15-A0, PS
,DS,IS,R/W, and BR timings are all included in timings referenced as “address”.
7. Read data access time is defined as t
a(A)
=t
su(A)
+t
w(SL)
-- t
su(D)R
.
ADVANCE INFORMATION

Texas Instruments TMS320 Specifications

General

Brand	Texas Instruments
Model	TMS320
Category	Computer Hardware
Language	English