Acer AL1516 - Chapter 7 Schematic Diagram; Main Board

41
Schematic Diagram
VLCD_12V
PB[12..23]
VCC3.3
+5V
PB[6..11]
TSUM16AK SCHEMATIC
PA[14..19]
B3
3.INPUT
RIN
GIN
BIN
VSYNC
GNDR
GNDG
GNDB
DET_VGA
HSYNC
SOG
B+
CLK-
DET_DVI
CLK+
R+
G+
R-
B-
G-
DDCA_SDA
DDCA_SCL
DDCD_SDA
DDCD_SCL
+5V
DDC_WP
PC5V
VLCD_12V
B4
4.SCALER
RIN
GIN
SOG
BIN
GNDR
GNDG
GNDB
HSYNC
VSYNC
Adj_BACKLIGHT
VCC1.8
Vcc3.3
VCTRL
PA[0..7]
PA[8..13]
R+
R-
G-
G+
B+
B-
CLK+
CLK-
DDCD_SDA
DDCD_SCL
DET_DVI
DDCA_SDA
DDCA_SCL
DET_VGA
on_BACKLIGHT
on_Panel
+5V
PA[14..19]
PB[0..5]
PB[6..11]
GPO[0..4]
ESP
OSP
on_PANEL_12V
PB[12..23]
+12V
DDC_WP
TOP
A
TSUM16AK
B
05Monday, May 30, 2005
Title
Size Document Number Rev
Date: Sheet
of
VLCD
VCC1.8
LVDS OUTPUT
+5V
B2
2.POWER
on_Panel
on_BACKLIGHT
Adj_BACKLIGHT
+3V3
VCC1.8
VLCD
+5V
VCTRLPC5V
VCC5V
VCC3.3
on_PANEL_12V
VLCD_12V
+12V
VCC3.3
XGA/SXGA
VCC1.8
GPO[0..4]
VCC5V
PA[8..13]
+12V
VLCD
+3V3
+12V
PB[0..5]
B5
5.PANEL INTERFACE
VLCD
PA[0..7]
PA[8..13]
ESP
PA[14..19]
PB[0..5]
PB[6..11]
GPO[0..4]
OSP
VLCD_12V
PB[12..23]
+5V
PA[0..7]
Cha
p
ter 7