ADLINK Technology cExpress-AL - Functional Diagram

cExpress-AL
Specifications 7
2.16. Functional Diagram
AB
Intel® Atom®
Intel® Pentium®
Intel® Celeron®
“Apollo Lake”
CD
SODIMM
1867/1600 MHz
2‐8 GB DDR3L
non‐ECC
DDI1 (4 lanes)
DP/HDMI
HD Audio
2x SATA 6Gb/s (port 0/1)
8x USB 2.0/1.0 (ports 0‐7)
(OTG on port 0, OS dependent)
MIPI60
60‐pin
(build option)
DDI2 (4 lanes)
DP/HDMI
3x USB 3.0 upgrade
(ports 0/1/2)
Single/dual channel
18/24‐bit LVDS
eDP
LM73
SEMA
BMC
SMBus
GP I2C
SPI 0
BIOS
LPC bus
SPI
SPI 1
BIOS
DDC I2C
SPI_CS#
SODIMM
1867/1600 MHz
2‐8 GB DDR3L
non‐ECC
eDP x4 lanes (build option)
LVDS
eDP to LVDS
4x GPI, 4x GPO (SD)
GPIO
SD
PCIe x1 (port0)
PCIe x1 (port1)
PCIe x1 (port2)
PCIe Bridge
(build option)
PCIe x1 (port3)
PCIe x1 (port4)
GbE
TPM 2.0
(build option)
I2C
MUX
VGA
DP to VGA
(build option)
Note: max. capacity is 8GB
(2x 4GB or 1x 8GB)
UART0
UART1
LPC to
UART
GBE0_SDP
eMMC 5.0
8/16/32GB
(build option)
Figure 1: cExpress-AL Functional Block Diagram