ADLINK Technology cExpress-AL - Page 80

74 BIOS Setup
Feature Options Description
PME SCI
Disable
Enable
PCI Express PME SCI Enable/Disable
Hot Plug
Disable
Enable
PCI Express Hot Plug Enable/Disable
PCIe Speed
Auto
Gen1
Gen2
Configure PCIe Speed
Transmitter Half Swing
Disable
Enable
Transmitter Half Swing Enable/Disable.
Extra Bus Reserved
0
Extra Bus Reserved (0-7) for bridges behind this Root
Bridge
Reserved Memory
10
Reserved Memory and Prefetchable Memory (1-
20MB) Range for this Root Bridge
Reserved I/O
4
Reserved I/O (4K/8K/12K/16K/20K) Range for this
Root Bridge
PCH PCIe LTR Configuration Info only
PCH PCIE LTR
Disable
Enable
PCH PCIE Latency Reporting Enable/Disable
Snoop Latency Override
Disabled
Manual
Auto
Snoop Latency Override for PCH PCIE.
Disabled: Disable override.
Manual: Manually enter override values.
Auto (default): Maintain default BIOS flow.
Non Snoop Latency Override
Disabled
Manual
Auto
Non Snoop Latency Override for PCH PCIE.
Disabled: Disable override.
Manual: Manually enter override values.
Auto (default): Maintain default BIOS flow
PCIE LTR Lock
Disable
Enable
PCIE LTR Configuration Lock
PCIe Selection De0emphasis
Disable
Enable
When the Link is operating at 5.0 GT/s speed, this bit
selects the level of de-emphasis for an Upstream
component.
1b -3.5 dB
0b -6 dB
Chipset > South Cluster Configuration > PCI Express Configuration > PCI Express Root Port 3
Feature Options Description
PCI Express Root Port 3
Disable
Enable
Auto
Control the PCI Express Root Port.
AUTO: To disable unused root port automatically for
the most optimum power savings.
Enable: Enable PCIe root port.
Disable: Disable PCIe root port.
ASPM
Disable
Enable
PCI Express Active State Power Management settings
L1 Substates
Disable
L1.1
L1.2
L1.1 & L1.2
PCI Express L1 Substates settings.
ACS
Disable
Enable
Enable/Disable Access Control Services Extended
Capability
URR
Disable
Enable
CI Express Unsupported Request Reporting
Enable/Disable
FER
Disable
Enable
PCI Express Device Fatal Error Reporting
Enable/Disable