ADLINK Technology SMARC LEC-MTK-I1200 - GPIO Interface

LEC-MTK-i1200 User’s Guide SGET SMARC Rev 2.1
Page 39 copyright © 2023 ADLINK Technology Inc.
4.4.8 GPIO
Name
Pin
#
Description
I/O
Type
I/O
Level
Power
Domain
PU / PD
Comments
GPIO0 /
CAM0_PWR#
P108
General purpose I/O pin 0.
I/O
CMOS
1.8V
Runtime
PU 470K
1
alternate use is Camera 0 Power Enable, active low
output
GPIO1 /
CAM1_PWR#
P109
General purpose I/O pin 1.
I/O
CMOS
1.8V
Runtime
PU 470K
1
alternate use is Camera 1 Power Enable, active low
output
GPIO2 /
CAM0_RST#
P110
General purpose I/O pin 2.
I/O
CMOS
1.8V
Runtime
PU 470K
1
alternate use is Camera 0 Reset, active low output
GPIO3 /
CAM1_RST#
P111
General purpose I/O pin 3.
I/O
CMOS
1.8V
Runtime
PU 470K
1
alternate use is Camera 1 Reset, active low output
GPIO4 /
HDA_RST#
P112
General purpose I/O pin 4.
I/O
CMOS
1.8V
Runtime
PU 470K
1
alternative use is HD Audio Reset, active low output
GPIO5 /
PWM_OUT
P113
General purpose I/O pin 5.
I/O
CMOS
1.8V
Runtime
PU 470K
1
alternate use is PWM output
GPIO6 /
TACHIN
P114
General purpose I/O pin 6.
I/O
CMOS
1.8V
Runtime
PU 470K
1
FAN Tachometer input (used with GPIO5 PWM_OUT)
GPIO7
P115
General purpose I/O pin 7.
I/O
CMOS
1.8V
Runtime
PU 470K
1
GPIO8
P116
General purpose I/O pin 8.
I/O
CMOS
1.8V
Runtime
PU 470K
1
GPIO9
P117
General purpose I/O pin 9.
I/O
CMOS
1.8V
Runtime
PU 470K
1
GPIO10
P118
General purpose I/O pin 10.
I/O
CMOS
1.8V
Runtime
PU 470K
1
GPIO11
P119
General purpose I/O pin 11.
I/O
CMOS
1.8V
Runtime
PU 470K
1
GPIO12
S142
General purpose I/O pin 12
I/O
CMOS
1.8V
Runtime
PU 470K
1
advised as INT signal to any expander on carrier.
GPIO13
S123
General purpose I/O pin 13
I/O
CMOS
1.8V
Runtime
PU 470K
1
Note: Allows for in-SoC Pull-Ups. These can be ≤
10k. Max 2.2k PD should be implemented on Carrier when needing low levels.