Chapter 8 405
ADC/Interface Section
A3 Assembly ADC Circuits
10.Set the detector mode to NORMAL.
11.Check that A3U509 pin 9 has pulses every 130 µs and U509 pin 7
has pulses every 667 µs (although pulse widths may be changing).
ADC ASM
Refer to function block F of A3 Interface Assembly Schematic Diagram
(sheet 2 of 6) in the
8560 E-Series Spectrum Analyzer Component Level
Information.
1. Press
PRESET on the spectrum analyzer and set the controls as
follows:
Span .................................................................................0Hz
Sweep time ........................................................................ 60s
Detector mode ..........................................................SAMPLE
2. Check that HSTART_SRC (U504 pin 4) goes TTL high, causing
HHOLD (U506 pin 16) to go high 15 µs later.
3. Check that HSTART_ADC (U506 pin 15) goes TTL high 19 µs after
HSTART_SRC goes high.
4. HHOLD should stay TTL high for approximately 18 µs, and
HSTART_ADC should stay high for approximately 31 µs.
5. Check that LCMPLT (U504 pin 15) goes TTL low 12 µs after
HSTART_ADC goes high (12 bits at 1 µs per bit). LCMPLT indicates
that the successive approximation state machine (SASM) has
completed the ADC conversion.
6. Check that LDONE (U506 pin 19) goes TTL low approximately 2 µs
after LCMPLT goes low.
ADC
Refer to function block A of A3 Interface Assembly Schematic Diagram
(sheet 2 of 6) in the 8560 E-Series Spectrum Analyzer Component Level
Information.
The successive approximation state machine (SASM) consists of
A3U527 and A3U528. Upon the occurrence of HSTART_ADC, the
SASM successively toggles bits from high to low starting with the most
significant bit. The digital result is then converted to an analog current
in DAC U518 and compared with the SAMPLED VIDEO. If the DAC
current is too high, the output of U512 will be low, telling the SASM
that the "guess" was high and that the bit just toggled should remain
low. It then moves on to the next most significant bit until all 12 bits
have been "guessed" at. Each "guess" takes 1 µs (one cycle of
HBADC_CLK0), or 12 µs to complete a conversion. When the
conversion is completed, the SASM sets LCMPLT low. The bits are
written to the data bus by buffers U514 and U516.
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