Allen-Bradley 1785 PLC-5 - Counter Structure and Mnemonics

Addressing Reference
1785 PLC-5
15
T able D
Example T imer Addresses
To Address: PLC Data Type: Example Address:
Whole Timer Structure structure $T4:5
Timer Accumulated Word signed word $T4:3.ACC
Timer Preset Word signed word $T4:3.PRE
Timer Enabled Bit bit $T4:3.TE
Timer Timing Bit bit $T4:3.TT
Timer Done Bit bit $T4:3.TD
T able E
Counter Mnemonics
Mnemonic Structure Member Size PLC Data Type
.CU Up Enable 1 bit bit
.CD Down Enable 1 bit bit
.DN Done 1 bit bit
.OV Overflow 1 bit bit
.UN Underflow 1 bit bit
.PRE Preset Value 2 bytes signed word
.ACC Accumulated Value 2 bytes signed word
Figure 15
Counter Structure
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
17375–I
CU CD DN Reserved
PRE – Preset V alue (–32,768 thru +32,767)
ACC – Accumulated V alue (–32,768 thru +32,767)
OV UN