Altera DE2-70 - Page 56

DE2-70 User Manual
53
TD1_D6
TD1_D7
TD1_D0
I2C_SC
LK
I2C_SD
AT
28MHZ
TD2_D0
TD2_D1
TD2_D
2
TD2_D
3
TD2_D4
TD2_D
5
TD2_D6
TD2_D7
TD1_D1
28MHZ
TD1_D2
TD1_D3
TD1_D4
TD1_D5
I2C_SDAT
I2
C_SCLK
TD1_RESET_n
TD2_RESET_n
TD2_H
S
TD2_VS
TD1_HS
TD2_D[0..7]
TD2_CLK27
TD1_VS
TD1_D[
0..7]
TD1_CLK27
VGND
VGND
V_VCC33
V_VCC18
V_VCC33
AV2_VC
C
18
PV2_VC
C18
V_VCC33
V_VCC18
V
_
VCC33
AV1_VC
C18
PV1_VC
C18
V
_
VCC33
VGND
VGND
VGND
V_VCC33 VGND
I2C ADDRESS IS 0x42
I2C ADDRESS IS 0x40
R98
120
R98
120
R96
1.74K
R96
1.74K
R92
120
R92
120
R95
39
R95
39
C27 0.1uC27 0.1u
J8J8
C36
10n
C36
10n
J9
RCA JACK
J9
RCA JACK
R97
12
0
R97
12
0
R93
120
R93
120
R89
36
R89
36
RN44
47
RN44
47
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
C34
0.1u
C34
0.1u
R94
36
R94
36
C26 0.1uC26 0.1u
U11
ADV7180
U11
ADV7180
HS
39
DGND
3
XTAL1
12
XTAL
13
DVDD
14
DGND
35
P1
16
P0
17
P4
8
P3
9
P2
10
LLC
11
P5
7
P6
6
P7
5
INTRQ
38
DVDDIO
1
DVDDIO
4
DGND
15
SFL
2
PWRDWN
18
PV
DD
20
AGND
21
DGND
40
AIN1
23
AIN2
29
AGND
24
TEST_0
22
VREFP
25
AVDD
27
AGND
28
VREFN
26
AIN3
30
RESET
31
ALSB
32
SDATA
33
SCLK
34
DVDD
36
VS/FIELD
37
ELPF
19
EXPOSED
41
C29 0.1uC29 0.1u
C32
0.1u
C32
0.1u
RN45
47
RN45
47
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
C33
0.1u
C33
0.1u
R91
1.74K
R91
1.74K
C30
10n
C30
10n
C28
0.1u
C28
0.1u
C35
0.1u
C35
0.1u
C31
0.1u
C31
0.1u
U12
ADV7180
U12
ADV7180
HS
39
DGND
3
XTAL1
12
XTAL
13
DVDD
14
DGND
35
P1
16
P0
17
P4
8
P3
9
P2
1
0
LLC
11
P5
7
P6
6
P7
5
INTRQ
38
D
VDDIO
1
DVDDIO
4
DGND
15
SFL
2
PWRDWN
18
PVDD
20
AGND
21
DGND
40
AIN1
23
AIN2
29
AGND
24
TEST_0
22
VREFP
25
AVDD
27
AGND
28
VREFN
26
AIN3
30
RESET
31
ALSB
32
SDATA
33
SCLK
34
DVDD
36
VS/FIELD
37
EL
PF
19
EXPOSED
41
D83
BAT54S
D83
BAT54S
1 2
3
C37
0.1u
C37
0.1u
D84
BAT54S
D84
BAT54S
1 2
3
R90
39
R90
39
Figure 5.18. TV Decoder schematic.
Signal Name FPGA Pin No. Description
TD1_D[0] PIN_A6 TV Decoder 1 Data[0]
TD1_D[1] PIN_B6 TV Decoder 1 Data[1]
TD1_D[2] PIN_A5 TV Decoder 1 Data[2]
TD1_D[3] PIN_B5 TV Decoder 1 Data[3]
TD1_D[4] PIN_B4 TV Decoder 1 Data[4]
TD1_D[5] PIN_C4 TV Decoder 1 Data[5]
TD1_D[6] PIN_A3 TV Decoder 1 Data[6]
TD1_D[7] PIN_B3 TV Decoder 1 Data[7]
TD1_HS PIN_E13 TV Decoder 1 H_SYNC
TD1_VS PIN_E14 TV Decoder 1 V_SYNC