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ASROCK Intel N100 Series User Manual

ASROCK Intel N100 Series
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25
Intel N100 Series
Refresh Cycle Time 2 (tRFC)
e number of clocks from a Refresh command until the rst Activate command to the
same rank.
RAS to RAS Delay (tRRD_L)
e number of clocks between two rows activated in dierent banks of the same rank.
RAS to RAS Delay (tRRD_S)
e number of clocks between two rows activated in dierent banks of the same rank.
Write to Read Delay (tWTR_L)
e number of clocks between the last valid write operation and the next read command to
the same internal bank.
Write to Read Delay (tWTR_S)
e number of clocks between the last valid write operation and the next read command to
the same internal bank.
Read to Precharge (tRTP)
e number of clocks that are inserted between a read command to a row pre-charge
command to the same rank.
Four Activate Window (tFAW)
e time window in which four activates are allowed the same rank.
CAS Write Latency (tCWL)
Congure CAS Write Latency.
Third Timing
tREFI
Congure refresh cycles at an average periodic interval.
tCKE
Congure the period of time the DDR4 initiates a minimum of one refresh command
internally once it enters Self-Refresh mode.
tRC
Congure the minimum active to active/Refresh Time.

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ASROCK Intel N100 Series Specifications

General IconGeneral
BrandASROCK
ModelIntel N100 Series
CategoryMotherboard
LanguageEnglish

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