AVR1612
7
8282A-AVR-11/10
3 The Programming Interface
The PDI low level driver layer handles the basic interface to the USART driver. The
physical layer uses a bi-directional half-duplex synchronous serial receiver and
transmitter (as a USART in USART mode). The physical layer includes start-of-frame
detection, frame error detection, parity generation, parity error detection, and collision
detection. The PDI is accessed through two pins. Table 3-1
shows the PDI interface
checklist.
Table 3-1. PDI port interface checklist.
Signal name Recommended pin connection Description
PDI_CLK
A reset pull-up should be 10k or weaker, or be removed altogether.
Any reset decoupling capacitors should be removed if PDI programming and
debugging is used.
Other external reset sources driving this line should be disconnected.
(Any load on the clock line may give a delay on the clock edge that causes
data bit to sampled/generated too late and result in communication failure.)
PDI_CLK: clock input/Reset pin
(internally pulled-up)
PDI_DATA Connect to programming header/test point only
PDI_DATA: PDI data input/output
(internally pulled-down)
In addition to these two pins, VCC and GND must also be connected between the
External Programmer/debugger and the device. Figure 3-1 sho
ws a typical
connection.
Figure 3-1. PDI connection.
3.1 Overview of the PDI programming process
The process of the PDI programming is shown below:
1. Enable the PDI module.
2. Enter external programming mode.
3. Program or read the memory (Flash/EEPROM /Fuses/Lock-bits) with PDI.
4. Exit the PDI programming mode.
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