Avnet Ultra96-V2 - Glossary; Reference Documents

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3.1 Glossary
Term
Definition
PS
Zynq UltraScale+ MPSoC Processing System
PL
Zynq UltraScale+ MPSoC Programmable Logic
MIO
PS Multiplexed Input Output Pins
POR
Power On Reset
APU
Application Processing Unit
RPU
Real-time Processing Unit
GPU
Graphics Processing Unit
SYSMON
System Monitor
HD
High Density PL I/O Pins
HP
High Performance PL I/O Pins
PMBus
Power Management Bus
3.2 Reference Documents
[1] Zynq UltraScale+ MPSoC Overview
[2] Zynq UltraScale+ MPSoC DC and AC Switching Characteristics
[3] Zynq UltraScale+ MPSoC Technical Reference Manual
[4] Zynq UltraScale+ MPSoC Packaging and Pinout Product Specification
[5] Zynq UltraScale+ MPSoC PCB Design Guide
[6] UltraScale Architecture SelectIO Resources
[7] SBVA484 Package File
[8] Xilinx Vivado Design Suite
[9] Xilinx Software Development Kit
[10] 96Boards Specification
[11] WiLink8 2.4GHz WiFi + Bluetooth Module
[12] USB3320 Hi-Speed USB 2.0 ULPI Transceiver
[13] USB5744 Smart Hub
[14] Micron MT53B512M32D2NP-062 WT:C LPDDR4 SDRAM datasheet
[15] Delkin Devices Utility Industrial MLC microSD