Carrier 42HQG018 - Page 52

51
101112131415161718
GND1817161514131211
COMMONO8O7O6O5O4O3O2O1
987654321
PIN CONNECTION (TOP VIEW)
COMMON
GND
OUTPUT
2.7k
7.2k
3k
INPUT
SCHEMATICS (EACH DRIVER)
3) U4 (14584B): SCHUMITT TRIGGER INVERTER
1
2
3
4
5
6
9
8
11
10
I3
12
LOGIC DIAGRAM
V
DD=PIN14
Vss=PIN7
EQUIVALENT CIRCUIT SCHEMATIC
(1/2 OF CIRCUIT SHOWN)
4) U5 (NM24C02): EEPROM
AO
A1
A2
Vss
1
2
3
45
6
7
8
Vcc
NC
SCL
SDA
NM24CO2L
NM24CO4L
A0,A1,A2
Vss
SDA
SCL
NC
Vcc
Device Address Inputs
Ground
Data I/0
Clock Input
No Connection
+5V
Pin Names
TL/ D/ 11099-2
Top View
See NS Package Number
MO8A(M8) and NO8E(N)
Dual-In-Line Package(N)
and SO Package(M8)
2) U2 (TD62083AP): DARLINGTON ARRAYS