Casio MG-500 - Page 13

4
CPU
(uPD78C10G)
PIN
FUNCTIONS
Pin
No.
|
Terminal
Signal
|
In/Out
Function
59
PAO
Swi
In
_|
Inputs
from
the
DIP
switches
4 PAS
1 PAG
2 PAT
3
PBO
sws
4
Pat
si
In
5
PB2
2
In
6
PB3
$3
In
7
PB4
S4
In
|
Low
when
mode
switch
is
“PROGRAM”.
8
PBS
$5
In|
Lowwhen
mode
switch
is
“BEND”
9
PBE
Lo3
Out
|
b
LED
drive
signal.
Low
active.
10
P87
Lb2
Out
_|
#
LED
drive
signal.
Low
active.
n
PCO
Mi
Out
_|
MIDI
data
output
12
Pci
Lot
Out
_|
Pilot
lamp
drive
signal.
Low
active.
13
PC2
In|
2M
Hz
MIDI
clock
pulse
input
4
PCs
CLA
Out
__|
Resets
gate
array’s
built-in
counters
15
PCa
CLK
‘Out
__|
Clock
signal
for
gate
array’s
bu
16
PCS
: E
Not
used
7
PCE
>
in|
The
guitar
becomes
self
diagnostic
mode
when
this,
terminal
is
Low
and
power
switch
is
turned
on.
18,
19
|
PC7,NMI
:
=
Not
used
20
INTI
INTT
in
__|
interrupt
from
the
gate
array
21
MODE
: :
Not
used
22
RESET
:
In|
Power
ON
reset
signal
input
23
MODEO
E
:
Not
used
24,25
|
X2,X1
:
In/Out
_|
15M
Hz
clock
pulse
input/output
26
vss
: -
Ground
(0
V)
source
27
AVSS
: =
Ground
for
the
built-in
ADCs
28
ANO
ENV1
In
Envelope
signal
from
the
1st
string
29
ANI
ENV2
In
__|
Envelope
signal
from
the
2nd
string
30
AN2
ENV3
In
___|
Envelope
signal
from
the
3rd
string
31
‘AN3
ENV4
in
__
|
Envelope
signal
from
the
4th
string
32
‘ANS
ENVS
In|
Envelope
signal
from
the
5th
string
33
ANS
ENVE
in
|
Envelope
signal
from
the
6th
string
34,35
[ANG,AN7
|
- =
Not
used
36
VREF
E
In
__|
Reference
voltage
(+5
V)
for
the
built-in
ADCs
37
AVDD
=
in|
+5
V
source
for
built-in
ADCs
ate