Casio SK 8A - 13. RESET & POWER ON;OFF DETECTION CIRCUIT

13. RESET & POWER ON/OFF DETECTION CIRCUIT
When the power switch is turned on, terminal Ml receives a
differential pulse which triggers CPU operation. By receiving
signal K09 from Kl 1 ~ KI4, or K18 terminal, CPU
descriminates the Mode switch position.
Since VA stays at +5V even power switch is turned off or at
the APO (Auto Power Off), the reset signal appears only when
new batteries are set or an AC adaptor is inserted.
The noise killer circuit eliminates negative portion of signal
Ml at Power OFF.
S-8053 is a voltage detector which observes VA (+5V). When
voltage VA becomes less than 2.8V, output pin 1 provides
LOW level to turn T13 on. Receiving HIGH level from RESET
terminal, CPU stops its functioning.
Voltage down
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