Chrontel CH7511B - GPIO Pins for Panel Selection

CHRONTEL AN-B014
8 206-1000-014 Rev. 1.7 2020-07-14
BLDN
55
BLUP
56
PW RDN
41
R1
10K
SW 1
BLDN
+3.3V
R5
10K
SW 3
+3.3V
PW RDN
BLUP
C1
0.1uF
R2
10K
BLUPBLUPBLUPBLUPBLUPBLUP
R3
10K
SW 2
C2
0.1uF
+3.3V
C3
0.1uF
R6
10K
R4
10K
CH7511
Figure 8: BLDN, BLUP and PWRDN Connections
• GPIO [0:3]
These pins can be used as panel select signals. They can be pulled high or low forming into 16 different combinations.
Every combination can match with one panel type. The connection is shown in Figure 9.
R2
10K
R3
10K
R4
10K
R6
100
R7
100
R8
100
R5
100
GPIO[3]
GPIO[2]
GPIO[1]
GPIO[0]
33
GPIO[1]
34
GPIO[2]
37
GPIO[3]
38
U1
CH7511
GPIO[0]
R1
10K
LVDD(+3.3V)
Figure 9: GPIO [0:3] connections
Method 1 (default)
GPIO [3:0] can be connected to high/low level by pull-up/pull-down resistors on the CH7511B/7512B PCB board;
The CH7511B/7512B can obtain the correct LVDS Panel selection value upon power ON or reset. As shown in
Figure 10, if the customer don’t want to change MB, they can they the GPIO[0:3] in LCD inverter to identify
different panel.