Clevo NS50PU - Page 50

Schematic Diagrams
B - 4 Processor 2/13
B.Schematic Diagrams
Processor 2/13
Sheet 3 of 49
Processor 2/13
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MB_1_CLK_DDR#1
MB_1_CLK_DDR1
MB_1_CLK_DDR#0
MB_1_CLK_DDR0
MB_1_DQS4
MB_1_DQS1
MB_1_DQS5
MB_1_DQS0
MB_1_DQS7
MB_1_DQS6
MB_1_DQS3
MB_1_DQS#5
MB_1_DQS#4
MB_1_DQS#1
MB_1_DQS2
MB_1_DQS#0
MB_1_DQS#7
MB_1_DQS#6
MB_1_DQS#3
MB_1_DQS#2
MB_1_A15
MB_1_A14
MB_1_CS1
MB_1_ODT1
MB_1_BG0
MB_1_A5
MB_1_A7
MB_1_A6
MB_1_A8
MB_1_BA1
MB_1_A16
MB_1_CKE0
MB_1_CKE1
MB_1_BG1
MB_1_A12
MB_1_A9
MB_1_A10
MB_1_BA0
MB_1_A3
MB_1_A4
MB_1_A13
MB_1_ODT0
MB_1_ACTN
MB_1_PAR
MB_1_A2
MB_1_CS0
MB_1_A0
MB_1_A1
MB_1_A11
MB_1_CA0_VREF
MB_1_ALERT_N_L
MB_1_DQ7_2
MB_1_DQ7_0
MB_1_DQ7_1
MB_1_DQ6_7
MB_1_DQ6_2
MB_1_DQ7_6
MB_1_DQ7_3
MB_1_DQ6_4
MB_1_DQ6_5
MB_1_DQ6_0
MB_1_DQ7_4
MB_1_DQ7_7
MB_1_DQ7_5
MB_1_DQ6_6
MB_1_DQ6_3
MB_1_DQ0_3
MB_1_DQ6_1
MB_1_DQ0_7
MB_1_DQ0_4
MB_1_DQ0_5
MB_1_DQ0_6
MB_1_DQ0_2
MB_1_DQ0_1
MB_1_DQ0_0
MB_1_DQ1_3
MB_1_DQ1_4
MB_1_DQ1_0
MB_1_DQ3_7
MB_1_DQ3_3
MB_1_DQ3_6
MB_1_DQ1_7
MB_1_DQ1_2
MB_1_DQ1_6
MB_1_DQ3_5
MB_1_DQ3_1
MB_1_DQ2_3
MB_1_DQ1_5
MB_1_DQ1_1
MB_1_DQ2_4
MB_1_DQ2_1
MB_1_DQ2_6
MB_1_DQ3_2
MB_1_DQ3_0
MB_1_DQ2_2
MB_1_DQ2_0
MB_1_DQ2_7
MB_1_DQ3_4
MB_1_DQ2_5
MB_1_DQ5_2
MB_1_DQ5_3
MB_1_DQ4_7
MB_1_DQ4_3
MB_1_DQ4_4
MB_1_DQ5_6
MB_1_DQ5_1
MB_1_DQ4_2
MB_1_DQ4_1
MB_1_DQ5_4
MB_1_DQ5_0
MB_1_DQ4_0
MB_1_DQ4_5
MB_1_DQ5_7
MB_1_DQ5_5
MB_1_DQ4_6
MB_1_CLK_DDR#1 [16]
MB_1_CLK_DDR1 [16]
MB_1_CLK_DDR0 [16]
MB_1_CLK_DDR#0 [16]
MB_1_DQS6 [16]
MB_1_DQS#6 [16]
MB_1_DQS7 [16]
MB_1_DQS#7 [16]
MB_1_DQS4 [16]
MB_1_DQS#4 [16]
MB_1_DQS5 [16]
MB_1_DQS#5 [16]
MB_1_DQS2 [16]
MB_1_DQS#2 [16]
MB_1_DQS3 [16]
MB_1_DQS#3 [16]
MB_1_DQS0 [16]
MB_1_DQS#0 [16]
MB_1_DQS1 [16]
MB_1_DQS#1 [16]
MB_1_A14 [16]
MB_1_A15 [16]
MB_1_ODT1 [16]
MB_1_CS1 [16]
MB_1_BG0 [16]
MB_1_A5 [16]
MB_1_A7 [16]
MB_1_A8 [16]
MB_1_A6 [16]
MB_1_BA1 [16]
MB_1_A16 [16]
MB_1_CKE0 [16]
MB_1_CKE1 [16]
MB_1_BG1 [16]
MB_1_A10 [16]
MB_1_A12 [16]
MB_1_A9 [16]
MB_1_BA0 [16]
MB_1_A3 [16]
MB_1_A4 [16]
MB_1_A13 [16]
MB_1_ODT0 [16]
MB_1_ACTN [16]
MB_1_PAR [16]
MB_1_A2 [16]
MB_1_CS0 [16]
MB_1_A0 [16]
MB_1_A1 [16]
MB_1_A11 [16]
MB_1_CA0_VREF [16]
MB_1_DQ7_[0:7][16]
MB_1_DQ6_[0:7][16]
MB_1_DQ5_[0:7][16]
MB_1_DQ3_[0:7][16]
MB_1_DQ2_[0:7][16]
MB_1_DQ4_[0:7][16]
MB_1_DQ1_[0:7][16]
MB_1_DQ0_[0:7][16]
MB_1_ALERT_N [16]
Title
Size Document Number R e v
Date: Sheet
of
6-71-NS5P0-D02
D01
[03] ADL-P C / DDR4 CH B
A3
349Thursday, February 10, 2022
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NS50PU
Title
Size Document Number R e v
Date: Sheet
of
6-71-NS5P0-D02
D01
[03] ADL-P C / DDR4 CH B
A3
349Thursday, February 10, 2022
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NS50PU
Title
Size Document Number R e v
Date: Sheet
of
6-71-NS5P0-D02
D01
[03] ADL-P C / DDR4 CH B
A3
349Thursday, February 10, 2022
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NS50PU
R209 0_04
DDR4 / LP4x / LP5_ascend / LP5_descen d / DDR5
BMAP_REV = 0.52
NA_71925
U16C
IC
INS26496851
3 OF 22
P53
DDR1_DQ_7_0/DDR1_DQ_7_0/DDR3_DQ_3_0/DDR7_DQ_1_0
P50
DDR1_DQ_7_1/DDR1_DQ_7_1/DDR3_DQ_3_1/DDR7_DQ_1_1
K53
DDR1_DQ_7_2/DDR1_DQ_7_2/DDR3_DQ_3_2/DDR7_DQ_1_2
H56
DDR1_DQ_7_3/DDR1_DQ_7_3/DDR3_DQ_3_3/DDR7_DQ_1_3
L48
DDR1_DQ_7_4/DDR1_DQ_7_4/DDR3_DQ_3_4/DDR7_DQ_1_4
F54
DDR1_DQ_7_5/DDR1_DQ_7_5/DDR3_DQ_3_5/DDR7_DQ_1_5
F58
DDR1_DQ_7_6/DDR1_DQ_7_6/DDR3_DQ_3_6/DDR7_DQ_1_6
K50
DDR1_DQ_7_7/DDR1_DQ_7_7/DDR3_DQ_3_7/DDR7_DQ_1_7
N58
DDR1_DQ_6_0/DDR1_DQ_6_0/DDR3_DQ_2_0/DDR7_DQ_0_0
P57
DDR1_DQ_6_1/DDR1_DQ_6_1/DDR3_DQ_2_1/DDR7_DQ_0_1
N56
DDR1_DQ_6_2/DDR1_DQ_6_2/DDR3_DQ_2_2/DDR7_DQ_0_2
P60
DDR1_DQ_6_3/DDR1_DQ_6_3/DDR3_DQ_2_3/DDR7_DQ_0_3
K60
DDR1_DQ_6_4/DDR1_DQ_6_4/DDR3_DQ_2_4/DDR7_DQ_0_4
L56
DDR1_DQ_6_5/DDR1_DQ_6_5/DDR3_DQ_2_5/DDR7_DQ_0_5
K57
DDR1_DQ_6_6/DDR1_DQ_6_6/DDR3_DQ_2_6/DDR7_DQ_0_6
L58
DDR1_DQ_6_7/DDR1_DQ_6_7/DDR3_DQ_2_7/DDR7_DQ_0_7
C45
DDR0_DQ_7_0/DDR1_DQ_5_0/DDR3_DQ_1_0/DDR6_DQ_1_0
E46
DDR0_DQ_7_1/DDR1_DQ_5_1/DDR3_DQ_1_1/DDR6_DQ_1_1
F44
DDR0_DQ_7_2/DDR1_DQ_5_2/DDR3_DQ_1_2/DDR6_DQ_1_2
B46
DDR0_DQ_7_3/DDR1_DQ_5_3/DDR3_DQ_1_3/DDR6_DQ_1_3
B41
DDR0_DQ_7_4/DDR1_DQ_5_4/DDR3_DQ_1_4/DDR6_DQ_1_4
F43
DDR0_DQ_7_5/DDR1_DQ_5_5/DDR3_DQ_1_5/DDR6_DQ_1_5
C42
DDR0_DQ_7_6/DDR1_DQ_5_6/DDR3_DQ_1_6/DDR6_DQ_1_6
E41
DDR0_DQ_7_7/DDR1_DQ_5_7/DDR3_DQ_1_7/DDR6_DQ_1_7
C51
DDR0_DQ_6_0/DDR1_DQ_4_0/DDR3_DQ_0_0/DDR6_DQ_0_0
E52
DDR0_DQ_6_1/DDR1_DQ_4_1/DDR3_DQ_0_1/DDR6_DQ_0_1
F51
DDR0_DQ_6_2/DDR1_DQ_4_2/DDR3_DQ_0_2/DDR6_DQ_0_2
B52
DDR0_DQ_6_3/DDR1_DQ_4_3/DDR3_DQ_0_3/DDR6_DQ_0_3
B48
DDR0_DQ_6_4/DDR1_DQ_4_4/DDR3_DQ_0_4/DDR6_DQ_0_4
F49
DDR0_DQ_6_5/DDR1_DQ_4_5/DDR3_DQ_0_5/DDR6_DQ_0_5
E48
DDR0_DQ_6_6/DDR1_DQ_4_6/DDR3_DQ_0_6/DDR6_DQ_0_6
C49
DDR0_DQ_6_7/DDR1_DQ_4_7/DDR3_DQ_0_7/DDR6_DQ_0_7
AV50
DDR1_DQ_5_0/DDR1_DQ_3_0/DDR2_DQ_3_0/DDR5_DQ_1_0
AW47
DDR1_DQ_5_1/DDR1_DQ_3_1/DDR2_DQ_3_1/DDR5_DQ_1_1
AU48
DDR1_DQ_5_2/DDR1_DQ_3_2/DDR2_DQ_3_2/DDR5_DQ_1_2
AV53
DDR1_DQ_5_3/DDR1_DQ_3_3/DDR2_DQ_3_3/DDR5_DQ_1_3
AP53
DDR1_DQ_5_4/DDR1_DQ_3_4/DDR2_DQ_3_4/DDR5_DQ_1_4
AR48
DDR1_DQ_5_5/DDR1_DQ_3_5/DDR2_DQ_3_5/DDR5_DQ_1_5
AP47
DDR1_DQ_5_6/DDR1_DQ_3_6/DDR2_DQ_3_6/DDR5_DQ_1_6
AP50
DDR1_DQ_5_7/DDR1_DQ_3_7/DDR2_DQ_3_7/DDR5_DQ_1_7
BE50
DDR1_DQ_4_0/DDR1_DQ_2_0/DDR2_DQ_2_0/DDR5_DQ_0_0
BE47
DDR1_DQ_4_1/DDR1_DQ_2_1/DDR2_DQ_2_1/DDR5_DQ_0_1
BD48
DDR1_DQ_4_2/DDR1_DQ_2_2/DDR2_DQ_2_2/DDR5_DQ_0_2
BE53
DDR1_DQ_4_3/DDR1_DQ_2_3/DDR2_DQ_2_3/DDR5_DQ_0_3
BA53
DDR1_DQ_4_4/DDR1_DQ_2_4/DDR2_DQ_2_4/DDR5_DQ_0_4
BB48
DDR1_DQ_4_5/DDR1_DQ_2_5/DDR2_DQ_2_5/DDR5_DQ_0_5
AY47
DDR1_DQ_4_6/DDR1_DQ_2_6/DDR2_DQ_2_6/DDR5_DQ_0_6
BA50
DDR1_DQ_4_7/DDR1_DQ_2_7/DDR2_DQ_2_7/DDR5_DQ_0_7
AU58
DDR0_DQ_5_0/DDR1_DQ_1_0/DDR2_DQ_1_0/DDR4_DQ_1_0
AV57
DDR0_DQ_5_1/DDR1_DQ_1_1/DDR2_DQ_1_1/DDR4_DQ_1_1
AU56
DDR0_DQ_5_2/DDR1_DQ_1_2/DDR2_DQ_1_2/DDR4_DQ_1_2
AV60
DDR0_DQ_5_3/DDR1_DQ_1_3/DDR2_DQ_1_3/DDR4_DQ_1_3
AP60
DDR0_DQ_5_4/DDR1_DQ_1_4/DDR2_DQ_1_4/DDR4_DQ_1_4
AR56
DDR0_DQ_5_5/DDR1_DQ_1_5/DDR2_DQ_1_5/DDR4_DQ_1_5
AP57
DDR0_DQ_5_6/DDR1_DQ_1_6/DDR2_DQ_1_6/DDR4_DQ_1_6
AR58
DDR0_DQ_5_7/DDR1_DQ_1_7/DDR2_DQ_1_7/DDR4_DQ_1_7
BD58
DDR0_DQ_4_0/DDR1_DQ_0_0/DDR2_DQ_0_0/DDR4_DQ_0_0
BE57
DDR0_DQ_4_1/DDR1_DQ_0_1/DDR2_DQ_0_1/DDR4_DQ_0_1
BD56
DDR0_DQ_4_2/DDR1_DQ_0_2/DDR2_DQ_0_2/DDR4_DQ_0_2
BE60
DDR0_DQ_4_3/DDR1_DQ_0_3/DDR2_DQ_0_3/DDR4_DQ_0_3
BA60
DDR0_DQ_4_4/DDR1_DQ_0_4/DDR2_DQ_0_4/DDR4_DQ_0_4
BB56
DDR0_DQ_4_5/DDR1_DQ_0_5/DDR2_DQ_0_5/DDR4_DQ_0_5
BA57
DDR0_DQ_4_6/DDR1_DQ_0_6/DDR2_DQ_0_6/DDR4_DQ_0_6
BB58
DDR0_DQ_4_7/DDR1_DQ_0_7/DDR2_DQ_0_7/DDR4_DQ_0_7
BG55
DDR1_VREF_CA0
BG57
DDR1_ALERT_N
AB56
DDR1_MA_11/NC/DDR6_CS_1/DDR6_CA_4/DDR3_CA_12
AM60
DDR1_MA_1/NC/DDR4_CS_1/DDR4_CA_4/DDR2_CS_0
AC50
DDR1_MA_0/NC/DDR7_CS_1/DDR7_CA_4/DDR3_CA_5
AM50
DDR1_CS_0/NC/DDR5_CS_1/DDR5_CA_4/DDR2_CA_4
T50
DDR1_MA_2/DDR7_CS_0/DDR7_CA_2/DDR7_CA_2/DDR3_CA_1
AA48
DDR1_PAR/DDR7_CS_1/DDR7_CS_0/DDR7_CA_3/DDR3_CA_3
Y56
NC/DDR6_CS_0/DDR6_CA_2/DDR6_CA_2/DDR3_CA_2
AC57
DDR1_ACT_N/DDR6_CS_1/DDR6_CS_0/DDR6_CA_3/DDR3_CA_9
AE50
DDR1_ODT_0/DDR5_CS_0/DDR5_CA_2/DDR5_CA_2/DDR2_CA_6
AK48
DDR1_MA_13/DDR5_CS_1/DDR5_CS_0/DDR5_CA_3/DDR2_CA_5
AJ56
DDR1_MA_4/DDR4_CS_0/DDR4_CA_2/DDR4_CA_2/DDR2_CA_12
AM57
DDR1_MA_3/DDR4_CS_1/DDR4_CS_0/DDR4_CA_3/DDR2_CS_1
AC53
DDR1_BA_0/DDR7_CA_0/DDR7_CA_0/DDR7_CA_6/DDR3_CA_10
AC47
DDR1_MA_10/DDR7_CA_1/DDR7_CA_1/DDR7_CA_5/DDR3_CA_8
AA46
NC/DDR7_CA_2/DDR7_CA_3/DDR7_CS_0/DDR3_CA_6
W53
NC/DDR7_CA_3/DDR7_CA_4/DDR7_CS_1/DDR3_CA_0
T47
NC/DDR7_CA_4/DDR7_CA_5/DDR7_CA_1/DDR3_CS_0
T53
NC/DDR7_CA_5/DDR7_CA_6/DDR7_CA_0/DDR3_CS_1
AC60
DDR1_MA_9/DDR6_CA_0/DDR6_CA_0/DDR6_CA_6/DDR3_CA_11
AB58
DDR1_MA_12/DDR6_CA_1/DDR6_CA_1/DDR6_CA_5/DDR3_CA_7
U57
DDR1_BG_1/DDR6_CA_2/DDR6_CA_3/DDR6_CS_0/NC
W60
DDR1_BG_0/DDR6_CA_3/DDR6_CA_4/DDR6_CS_1/DDR3_CA_4
T60
DDR1_CKE_1/DDR6_CA_4/DDR6_CA_5/DDR6_CA_1/NC
T55
DDR1_CKE_0/DDR6_CA_5/DDR6_CA_6/DDR6_CA_0/NC
AM53
DDR1_ODT_1/DDR5_CA_0/DDR5_CA_0/DDR5_CA_6/DDR2_CA_3
AM47
DDR1_CS_1/DDR5_CA_1/DDR5_CA_1/DDR5_CA_5/DDR2_CA_2
AH53
DDR1_MA_14/DDR5_CA_2/DDR5_CA_3/DDR5_CS_0/DDR2_CA_11
AK46
DDR1_MA_15/DDR5_CA_3/DDR5_CA_4/DDR5_CS_1/DDR2_CA_7
AE53
DDR1_MA_16/DDR5_CA_4/DDR5_CA_5/DDR5_CA_1/DDR2_CA_8
AE47
DDR1_BA_1/DDR5_CA_5/DDR5_CA_6/DDR5_CA_0/DDR2_CA_10
AL58
NC/DDR4_CA_0/DDR4_CA_0/DDR4_CA_6/DDR2_CA_0
AL56
NC/DDR4_CA_1/DDR4_CA_1/DDR4_CA_5/DDR2_CA_1
AH60
DDR1_MA_8/DDR4_CA_2/DDR4_CA_3/DDR4_CS_0/DDR2_CA_9
AF57
DDR1_MA_6/DDR4_CA_3/DDR4_CA_4/DDR4_CS_1/NC
AE55
DDR1_MA_7/DDR4_CA_4/DDR4_CA_5/DDR4_CA_1/NC
AE60
DDR1_MA_5/DDR4_CA_5/DDR4_CA_6/DDR4_CA_0/NC
BD61
DDR0_DQSN_4/DDR1_DQSN_0/DDR2_DQSN_0/DDR4_DQSN_0
BB61
DDR0_DQSP_4/DDR1_DQSP_0/DDR2_DQSP_0/DDR4_DQSP_0
AU61
DDR0_DQSN_5/DDR1_DQSN_1/DDR2_DQSN_1/DDR4_DQSN_1
AR61
DDR0_DQSP_5/DDR1_DQSP_1/DDR2_DQSP_1/DDR4_DQSP_1
BB51
DDR1_DQSN_4/DDR1_DQSN_2/DDR2_DQSN_2/DDR5_DQSN_0
BD51
DDR1_DQSP_4/DDR1_DQSP_2/DDR2_DQSP_2/DDR5_DQSP_0
AR51
DDR1_DQSN_5/DDR1_DQSN_3/DDR2_DQSN_3/DDR5_DQSN_1
AU51
DDR1_DQSP_5/DDR1_DQSP_3/DDR2_DQSP_3/DDR5_DQSP_1
A51
DDR0_DQSN_6/DDR1_DQSN_4/DDR3_DQSN_0/DDR6_DQSN_0
A49
DDR0_DQSP_6/DDR1_DQSP_4/DDR3_DQSP_0/DDR6_DQSP_0
A44
DDR0_DQSN_7/DDR1_DQSN_5/DDR3_DQSN_1/DDR6_DQSN_1
A43
DDR0_DQSP_7/DDR1_DQSP_5/DDR3_DQSP_1/DDR6_DQSP_1
L61
DDR1_DQSN_6/DDR1_DQSN_6/DDR3_DQSN_2/DDR7_DQSN_0
N61
DDR1_DQSP_6/DDR1_DQSP_6/DDR3_DQSP_2/DDR7_DQSP_0
L51
DDR1_DQSN_7/DDR1_DQSN_7/DDR3_DQSN_3/DDR7_DQSN_1
N51
DDR1_DQSP_7/DDR1_DQSP_7/DDR3_DQSP_3/DDR7_DQSP_1
AH57
NC/DDR4_CKE_1/DDR4_W CK_N/DDR4_WCK _N/NC
AJ58
NC/DDR4_CKE_0/DDR4_W CK_P/DDR4_W CK_P/NC
AJ51
NC/DDR5_CKE_1/DDR5_W CK_N/DDR5_WCK _N/NC
AL51
NC/DDR5_CKE_0/DDR5_W CK_P/DDR5_W CK_P/NC
Y58
NC/DDR6_CKE_1/DDR6_W CK_N/DDR6_WCK _N/NC
W57
NC/DDR6_CKE_0/DDR6_W CK_P/DDR6_W CK_P/NC
Y51
NC/DDR7_CKE_1/DDR7_W CK_N/DDR7_WCK _N/NC
AB51
NC/DDR7_CKE_0/DDR7_W CK_P/DDR7_W CK_P/NC
AJ61
DDR1_CLK_N_0/DDR4_CLK_N/DDR4_CLK_N/DDR4_CLK_N/DDR2_CLK_N_0
AL61
DDR1_CLK_P_0/DDR4_CLK_P/DDR4_CLK_P/DDR4_CLK _P/DDR2_CLK_P_0
AG48
NC/DDR5_CLK_N/DDR5_CLK_N/DDR5_CLK_N/DDR2_CLK_N_1
AG49
NC/DDR5_CLK_P/DDR5_CLK_P/DDR5_CLK_P/DDR2_CLK_P _1
Y61
NC/DDR6_CLK_N/DDR6_CLK_N/DDR6_CLK_N/DDR3_CLK_N_0
AB61
NC/DDR6_CLK_P/DDR6_CLK_P/DDR6_CLK_P/DDR3_CLK_P _0
V49
DDR1_CLK_N_1/DDR7_CLK_N/DDR7_CLK_N/DDR7_CLK_N/DDR3_CLK_N_1
V48
DDR1_CLK_P_1/DDR7_CLK_P/DDR7_CLK_P/DDR7_CLK _P/DDR3_CLK_P_1