Clevo NS50PU - Processor 10;13

Schematic Diagrams
Processor 1/13 B - 3
B.Schematic Diagrams
Processor 1/13
Sheet 2 of 49
Processor 1/13
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MA_0_DQ7_6
MA_0_DQ7_2
MA_0_DQ7_3
MA_0_DQ7_7
MA_0_DQ6_2
MA_0_DQ6_6
MA_0_DQ7_1
MA_0_DQ7_5
MA_0_DQ7_0
MA_0_DQ7_4
MA_0_DQ6_4
MA_0_DQ6_1
MA_0_DQ6_5
MA_0_DQ6_3
MA_0_DQ6_7
MA_0_DQ6_0
MA_0_DQ2_2
MA_0_DQ2_0
MA_0_DQ2_1
MA_0_DQ2_6
MA_0_DQ2_3
MA_0_DQ2_7
MA_0_DQ2_4
MA_0_DQ2_5
MA_0_DQ3_1
MA_0_DQ3_5
MA_0_DQ3_2
MA_0_DQ3_7
MA_0_DQ3_6
MA_0_DQ3_3
MA_0_DQ1_6
MA_0_DQ1_3
MA_0_DQ1_7
MA_0_DQ3_0
MA_0_DQ3_4
MA_0_DQ0_7
MA_0_DQ1_4
MA_0_DQ1_0
MA_0_DQ1_5
MA_0_DQ1_2
MA_0_DQ0_4
MA_0_DQ0_0
MA_0_DQ0_3
MA_0_DQ0_2
MA_0_DQ0_5
MA_0_DQ0_6
MA_0_DQ0_1
MA_0_DQ1_1
MA_0_DQ5_3
MA_0_DQ5_2
MA_0_DQ4_1
MA_0_DQ4_2
MA_0_DQ4_6
MA_0_DQ5_1
MA_0_DQ5_6
MA_0_DQ4_7
MA_0_DQ5_5
MA_0_DQ5_0
MA_0_DQ4_4
MA_0_DQ4_3
MA_0_DQ4_0
MA_0_DQ4_5
MA_0_DQ5_4
MA_0_DQ5_7
DRAM_RST#
DRAM_RST#
DDR_COMP_0
VDDQ
VDDQ[12,15,16,33]
MA_0_DQ5_[0:7][15]
MA_0_DQ6_[0:7][15]
MA_0_DQ7_[0:7][15]
MA_0_DQ4_[0:7][15]
MA_0_DQ0_[0:7][15]
MA_0_DQ1_[0:7][15]
MA_0_DQ2_[0:7][15]
MA_0_DQ3_[0:7][15]
MA_0_CLK_DDR1 [15]
MA_0_CLK_DDR#1 [15]
MA_0_DQS#0 [15]
MA_0_DQS0 [15]
MA_0_CLK_DDR#0 [15]
MA_0_CLK_DDR0 [15]
MA_0_DQS2 [15]
MA_0_DQS#1 [15]
MA_0_DQS1 [15]
MA_0_DQS#3 [15]
MA_0_DQS3 [15]
MA_0_DQS#2 [15]
MA_0_A7 [15]
MA_0_A5 [15]
DRAM_RST#_N [15,16]
MA_0_BA1 [15]
MA_0_A8 [15]
MA_0_A6 [15]
MA_0_CS1 [15]
MA_0_A14 [15]
MA_0_A15 [15]
MA_0_A16 [15]
MA_0_CKE1 [15]
MA_0_CKE0 [15]
MA_0_ODT1 [15]
MA_0_A12 [15]
MA_0_BG1 [15]
MA_0_BG0 [15]
MA_0_BA0 [15]
MA_0_A10 [15]
MA_0_A9 [15]
MA_0_A13 [15]
MA_0_A4 [15]
MA_0_A3 [15]
MA_0_A2 [15]
MA_0_PAR [15]
MA_0_ACTN [15]
MA_0_ODT0 [15]
MA_0_A1 [15]
MA_0_A0 [15]
MA_0_CS0 [15]
DDR_VTT_CTRL [33]
MA_0_CA0_VREF [15]
MA_0_A11 [15]
MA_0_ALERT_N [15]
MA_0_DQS#4 [15]
MA_0_DQS4 [15]
MA_0_DQS7 [15]
MA_0_DQS#7 [15]
MA_0_DQS#6 [15]
MA_0_DQS6 [15]
MA_0_DQS#5 [15]
MA_0_DQS5 [15]
Title
Size Document Number R e v
Date: Sheet
of
6-71-NS5P0-D02
D01
[02] ADL-P B/22 DDR4 CH A
A3
249Thursday, February 10, 2022
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NS50PU
Title
Size Document Number R e v
Date: Sheet
of
6-71-NS5P0-D02
D01
[02] ADL-P B/22 DDR4 CH A
A3
249Thursday, February 10, 2022
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NS50PU
Title
Size Document Number R e v
Date: Sheet
of
6-71-NS5P0-D02
D01
[02] ADL-P B/22 DDR4 CH A
A3
249Thursday, February 10, 2022
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NS50PU
R503 100_1%_04
R155 470_04
DDR4(IL) / DDR4(NIL) / DDR5(NIL) / LP4x-LP5(NIL)
BMAP_REV = 0.52
NA_71925
U16B
IC
INS26491427
2 OF 22
BP50
DDR1_DQ_3_0/DDR0_DQ_7_0/DDR1_DQ_3_0/DDR3_DQ_1_0
BP47
DDR1_DQ_3_1/DDR0_DQ_7_1/DDR1_DQ_3_1/DDR3_DQ_1_1
BN48
DDR1_DQ_3_2/DDR0_DQ_7_2/DDR1_DQ_3_2/DDR3_DQ_1_2
BP53
DDR1_DQ_3_3/DDR0_DQ_7_3/DDR1_DQ_3_3/DDR3_DQ_1_3
BK53
DDR1_DQ_3_4/DDR0_DQ_7_4/DDR1_DQ_3_4/DDR3_DQ_1_4
BL48
DDR1_DQ_3_5/DDR0_DQ_7_5/DDR1_DQ_3_5/DDR3_DQ_1_5
BJ47
DDR1_DQ_3_6/DDR0_DQ_7_6/DDR1_DQ_3_6/DDR3_DQ_1_6
BJ50
DDR1_DQ_3_7/DDR0_DQ_7_7/DDR1_DQ_3_7/DDR3_DQ_1_7
BY50
DDR1_DQ_2_0/DDR0_DQ_6_0/DDR1_DQ_2_0/DDR3_DQ_0_0
CA47
DDR1_DQ_2_1/DDR0_DQ_6_1/DDR1_DQ_2_1/DDR3_DQ_0_1
BW48
DDR1_DQ_2_2/DDR0_DQ_6_2/DDR1_DQ_2_2/DDR3_DQ_0_2
BY53
DDR1_DQ_2_3/DDR0_DQ_6_3/DDR1_DQ_2_3/DDR3_DQ_0_3
BT53
DDR1_DQ_2_4/DDR0_DQ_6_4/DDR1_DQ_2_4/DDR3_DQ_0_4
BU48
DDR1_DQ_2_5/DDR0_DQ_6_5/DDR1_DQ_2_5/DDR3_DQ_0_5
BT47
DDR1_DQ_2_6/DDR0_DQ_6_6/DDR1_DQ_2_6/DDR3_DQ_0_6
BT50
DDR1_DQ_2_7/DDR0_DQ_6_7/DDR1_DQ_2_7/DDR3_DQ_0_7
BN58
DDR0_DQ_3_0/DDR0_DQ_5_0/DDR1_DQ_1_0/DDR2_DQ_1_0
BP57
DDR0_DQ_3_1/DDR0_DQ_5_1/DDR1_DQ_1_1/DDR2_DQ_1_1
BN56
DDR0_DQ_3_2/DDR0_DQ_5_2/DDR1_DQ_1_2/DDR2_DQ_1_2
BP60
DDR0_DQ_3_3/DDR0_DQ_5_3/DDR1_DQ_1_3/DDR2_DQ_1_3
BK60
DDR0_DQ_3_4/DDR0_DQ_5_4/DDR1_DQ_1_4/DDR2_DQ_1_4
BL56
DDR0_DQ_3_5/DDR0_DQ_5_5/DDR1_DQ_1_5/DDR2_DQ_1_5
BK57
DDR0_DQ_3_6/DDR0_DQ_5_6/DDR1_DQ_1_6/DDR2_DQ_1_6
BL58
DDR0_DQ_3_7/DDR0_DQ_5_7/DDR1_DQ_1_7/DDR2_DQ_1_7
BW58
DDR0_DQ_2_0/DDR0_DQ_4_0/DDR1_DQ_0_0/DDR2_DQ_0_0
BY57
DDR0_DQ_2_1/DDR0_DQ_4_1/DDR1_DQ_0_1/DDR2_DQ_0_1
BW56
DDR0_DQ_2_2/DDR0_DQ_4_2/DDR1_DQ_0_2/DDR2_DQ_0_2
BY60
DDR0_DQ_2_3/DDR0_DQ_4_3/DDR1_DQ_0_3/DDR2_DQ_0_3
BT60
DDR0_DQ_2_4/DDR0_DQ_4_4/DDR1_DQ_0_4/DDR2_DQ_0_4
BU56
DDR0_DQ_2_5/DDR0_DQ_4_5/DDR1_DQ_0_5/DDR2_DQ_0_5
BT57
DDR0_DQ_2_6/DDR0_DQ_4_6/DDR1_DQ_0_6/DDR2_DQ_0_6
BU58
DDR0_DQ_2_7/DDR0_DQ_4_7/DDR1_DQ_0_7/DDR2_DQ_0_7
DE50
DDR1_DQ_1_0/DDR0_DQ_3_0/DDR0_DQ_3_0/DDR1_DQ_1_0
DE47
DDR1_DQ_1_1/DDR0_DQ_3_1/DDR0_DQ_3_1/DDR1_DQ_1_1
DC48
DDR1_DQ_1_2/DDR0_DQ_3_2/DDR0_DQ_3_2/DDR1_DQ_1_2
DE53
DDR1_DQ_1_3/DDR0_DQ_3_3/DDR0_DQ_3_3/DDR1_DQ_1_3
DA53
DDR1_DQ_1_4/DDR0_DQ_3_4/DDR0_DQ_3_4/DDR1_DQ_1_4
DB48
DDR1_DQ_1_5/DDR0_DQ_3_5/DDR0_DQ_3_5/DDR1_DQ_1_5
CY47
DDR1_DQ_1_6/DDR0_DQ_3_6/DDR0_DQ_3_6/DDR1_DQ_1_6
CY50
DDR1_DQ_1_7/DDR0_DQ_3_7/DDR0_DQ_3_7/DDR1_DQ_1_7
DL50
DDR1_DQ_0_0/DDR0_DQ_2_0/DDR0_DQ_2_0/DDR1_DQ_0_0
DM47
DDR1_DQ_0_1/DDR0_DQ_2_1/DDR0_DQ_2_1/DDR1_DQ_0_1
DK48
DDR1_DQ_0_2/DDR0_DQ_2_2/DDR0_DQ_2_2/DDR1_DQ_0_2
DL53
DDR1_DQ_0_3/DDR0_DQ_2_3/DDR0_DQ_2_3/DDR1_DQ_0_3
DG53
DDR1_DQ_0_4/DDR0_DQ_2_4/DDR0_DQ_2_4/DDR1_DQ_0_4
DH48
DDR1_DQ_0_5/DDR0_DQ_2_5/DDR0_DQ_2_5/DDR1_DQ_0_5
DG47
DDR1_DQ_0_6/DDR0_DQ_2_6/DDR0_DQ_2_6/DDR1_DQ_0_6
DG50
DDR1_DQ_0_7/DDR0_DQ_2_7/DDR0_DQ_2_7/DDR1_DQ_0_7
DD58
DDR0_DQ_1_0/DDR0_DQ_1_0/DDR0_DQ_1_0/DDR0_DQ_1_0
DE57
DDR0_DQ_1_1/DDR0_DQ_1_1/DDR0_DQ_1_1/DDR0_DQ_1_1
DD56
DDR0_DQ_1_2/DDR0_DQ_1_2/DDR0_DQ_1_2/DDR0_DQ_1_2
DE60
DDR0_DQ_1_3/DDR0_DQ_1_3/DDR0_DQ_1_3/DDR0_DQ_1_3
CY60
DDR0_DQ_1_4/DDR0_DQ_1_4/DDR0_DQ_1_4/DDR0_DQ_1_4
DB56
DDR0_DQ_1_5/DDR0_DQ_1_5/DDR0_DQ_1_5/DDR0_DQ_1_5
CY57
DDR0_DQ_1_6/DDR0_DQ_1_6/DDR0_DQ_1_6/DDR0_DQ_1_6
DA58
DDR0_DQ_1_7/DDR0_DQ_1_7/DDR0_DQ_1_7/DDR0_DQ_1_7
DK58
DDR0_DQ_0_0/DDR0_DQ_0_0/DDR0_DQ_0_0/DDR0_DQ_0_0
DL57
DDR0_DQ_0_1/DDR0_DQ_0_1/DDR0_DQ_0_1/DDR0_DQ_0_1
DK56
DDR0_DQ_0_2/DDR0_DQ_0_2/DDR0_DQ_0_2/DDR0_DQ_0_2
DL60
DDR0_DQ_0_3/DDR0_DQ_0_3/DDR0_DQ_0_3/DDR0_DQ_0_3
DG60
DDR0_DQ_0_4/DDR0_DQ_0_4/DDR0_DQ_0_4/DDR0_DQ_0_4
DH56
DDR0_DQ_0_5/DDR0_DQ_0_5/DDR0_DQ_0_5/DDR0_DQ_0_5
DG57
DDR0_DQ_0_6/DDR0_DQ_0_6/DDR0_DQ_0_6/DDR0_DQ_0_6
DH58
DDR0_DQ_0_7/DDR0_DQ_0_7/DDR0_DQ_0_7/DDR0_DQ_0_7
B56
DDR_COMP_2
A56
DDR_COMP_1
EE53
DRAM_RESET#
BG50
DDR_VTT_CTL
BG60
DDR0_VREF_CA0
BF61
DDR0_ALERT_N
CJ60
DDR0_MA_11/NC/DDR2_CS_1/DDR2_CA_4/DDR1_CA_11
CV57
DDR0_MA_1/NC/DDR0_CS_1/DDR0_CA_4/DDR0_CS_0
CJ50
DDR0_MA_0/NC/DDR3_CS_1/DDR3_CA_4/DDR1_CA_5
CV50
DDR0_CS_0/NC/DDR1_CS_1/DDR1_CA_4/DDR0_CA_4
CC50
DDR0_MA_2/DDR3_CS_0/DDR3_CA_2/DDR3_CA_2/DDR1_CA_1
CH48
DDR0_PAR/DDR3_CS_1/DDR3_CS_0/DDR3_CA_3/DDR1_CA_3
CF56
NC/DDR2_CS_0/DDR2_CA_2/DDR2_CA_2/DDR1_CA_2
CJ57
DDR0_ACT_N/DDR2_CS_1/DDR2_CS_0/DDR2_CA_3/DDR1_CA_9
CM50
DDR0_ODT_0/DDR1_CS_0/DDR1_CA_2/DDR1_CA_2/DDR0_CA_6
CU48
DDR0_MA_13/DDR1_CS_1/DDR1_CS_0/DDR1_CA_3/DDR0_CA_5
CR56
DDR0_MA_4/DDR0_CS_0/DDR0_CA_2/DDR0_CA_2/DDR0_CA_12
CV60
DDR0_MA_3/DDR0_CS_1/DDR0_CS_0/DDR0_CA_3/DDR0_CS_1
CJ53
DDR0_BA_0/DDR3_CA_0/DDR3_CA_0/DDR3_CA_6/DDR1_CA_10
CK47
DDR0_MA_10/DDR3_CA_1/DDR3_CA_1/DDR3_CA_5/DDR1_CA_8
CH46
NC/DDR3_CA_2/DDR3_CA_3/DDR3_CS_0/DDR1_CA_6
CE53
NC/DDR3_CA_3/DDR3_CA_4/DDR3_CS_1/DDR1_CA_0
CC47
NC/DDR3_CA_4/DDR3_CA_5/DDR3_CA_1/DDR1_CS_0
CC53
NC/DDR3_CA_5/DDR3_CA_6/DDR3_CA_0/DDR1_CS_1
CH58
DDR0_MA_9/DDR2_CA_0/DDR2_CA_0/DDR2_CA_6/DDR1_CA_7
CH56
DDR0_MA_12/DDR2_CA_1/DDR2_CA_1/DDR2_CA_5/DDR1_CA_12
CE60
DDR0_BG_1/DDR2_CA_2/DDR2_CA_3/DDR2_CS_0/DDR1_CA_4
CC57
DDR0_BG_0/DDR2_CA_3/DDR2_CA_4/DDR2_CS_1/NC
CB55
DDR0_CKE_1/DDR2_CA_4/DDR2_CA_5/DDR2_CA_1/NC
CC60
DDR0_CKE_0/DDR2_CA_5/DDR2_CA_6/DDR2_CA_0/NC
CV53
DDR0_ODT_1/DDR1_CA_0/DDR1_CA_0/DDR1_CA_6/DDR0_CA_3
CW47
DDR0_CS_1/DDR1_CA_1/DDR1_CA_1/DDR1_CA_5/DDR0_CA_2
CP53
DDR0_MA_14/DDR1_CA_2/DDR1_CA_3/DDR1_CS_0/DDR0_CA_11
CT46
DDR0_MA_15/DDR1_CA_3/DDR1_CA_4/DDR1_CS_1/DDR0_CA_7
CM53
DDR0_MA_16/DDR1_CA_4/DDR1_CA_5/DDR1_CA_1/DDR0_CA_8
CM47
DDR0_BA_1/DDR1_CA_5/DDR1_CA_6/DDR1_CA_0/DDR0_CA_10
CU56
NC/DDR0_CA_0/DDR0_CA_0/DDR0_CA_6/DDR0_CA_1
CU58
NC/DDR0_CA_1/DDR0_CA_1/DDR0_CA_5/DDR0_CA_0
CP60
DDR0_MA_8/DDR0_CA_2/DDR0_CA_3/DDR0_CS_0/DDR0_CA_9
CM57
DDR0_MA_6/DDR0_CA_3/DDR0_CA_4/DDR0_CS_1/NC
CL55
DDR0_MA_7/DDR0_CA_4/DDR0_CA_5/DDR0_CA_1/NC
CM60
DDR0_MA_5/DDR0_CA_5/DDR0_CA_6/DDR0_CA_0/NC
DK61
DDR0_DQSN_0/DDR0_DQSN_0/DDR0_DQSN_0/DDR0_DQSN_0
DH61
DDR0_DQSP_0/DDR0_DQSP_0/DDR0_DQSP_0/DDR0_DQSP_0
DC61
DDR0_DQSN_1/DDR0_DQSN_1/DDR0_DQSN_1/DDR0_DQSN_1
DB61
DDR0_DQSP_1/DDR0_DQSP_1/DDR0_DQSP_1/DDR0_DQSP_1
DH51
DDR1_DQSN_0/DDR0_DQSN_2/DDR0_DQSN_2/DDR1_DQSN_0
DK51
DDR1_DQSP_0/DDR0_DQSP_2/DDR0_DQSP_2/DDR1_DQSP_0
DB51
DDR1_DQSN_1/DDR0_DQSN_3/DDR0_DQSN_3/DDR1_DQSN_1
DC51
DDR1_DQSP_1/DDR0_DQSP_3/DDR0_DQSP_3/DDR1_DQSP_1
BW61
DDR0_DQSN_2/DDR0_DQSN_4/DDR1_DQSN_0/DDR2_DQSN_0
BU61
DDR0_DQSP_2/DDR0_DQSP_4/DDR1_DQSP_0/DDR2_DQSP_0
BN61
DDR0_DQSN_3/DDR0_DQSN_5/DDR1_DQSN_1/DDR2_DQSN_1
BL61
DDR0_DQSP_3/DDR0_DQSP_5/DDR1_DQSP_1/DDR2_DQSP_1
BU51
DDR1_DQSN_2/DDR0_DQSN_6/DDR1_DQSN_2/DDR3_DQSN_0
BW51
DDR1_DQSP_2/DDR0_DQSP_6/DDR1_DQSP_2/DDR3_DQSP_0
BL51
DDR1_DQSN_3/DDR0_DQSN_7/DDR1_DQSN_3/DDR3_DQSN_1
BN51
DDR1_DQSP_3/DDR0_DQSP_7/DDR1_DQSP_3/DDR3_DQSP_1
CP57
NC/DDR0_CKE_1/DDR0_W CK_N/DDR0_WCK_N/NC
CR58
NC/DDR0_CKE_0/DDR0_W CK_P/DDR0_WCK _P/NC
CU51
NC/DDR1_CKE_1/DDR1_W CK_N/DDR1_WCK_N/NC
CR51
NC/DDR1_CKE_0/DDR1_W CK_P/DDR1_WCK _P/NC
CF58
NC/DDR2_CKE_1/DDR2_W CK_N/DDR2_WCK_N/NC
CE57
NC/DDR2_CKE_0/DDR2_W CK_P/DDR2_WCK _P/NC
CH51
NC/DDR3_CKE_1/DDR3_W CK_N/DDR3_WCK_N/NC
CF51
NC/DDR3_CKE_0/DDR3_W CK_P/DDR3_WCK _P/NC
CR61
DDR0_CLK_N_0/DDR0_CLK_N/DDR0_CLK_N/DDR0_CLK_N/DDR0_CLK_N_0
CU61
DDR0_CLK_P_0/DDR0_CLK_P/DDR0_CLK_P/DDR0_CLK _P/DDR0_CLK_P_0
CN48
NC/DDR1_CLK_N/DDR1_CLK_N/DDR1_CLK_N/DDR0_CLK_N_1
CN49
NC/DDR1_CLK_P/DDR1_CLK_P/DDR1_CLK_P/DDR0_CLK_P _1
CF61
NC/DDR2_CLK_N/DDR2_CLK_N/DDR2_CLK_N/DDR1_CLK_N_0
CH61
NC/DDR2_CLK_P/DDR2_CLK_P/DDR2_CLK_P/DDR1_CLK_P _0
CD48
DDR0_CLK_N_1/DDR3_CLK_N/DDR3_CLK_N/DDR3_CLK_N/DDR1_CLK_N_1
CD49
DDR0_CLK_P_1/DDR3_CLK_P/DDR3_CLK_P/DDR3_CLK _P/DDR1_CLK_P_1
R162 0_04