5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPU
Reserved for external clock input
CRT
Mode Configure Table(Power On Latch)
RTD2168 Supports three operation mode for system design.
Reserve 4.7K resistor pull high/low for mode selection
POL1_SDA (PIN22)
01
X0
1
EP MODE
ROM ONLY MODE EEPROM MODE
POL2_SCL
(PIN23)
: PIN22 pull low, PIN23 pull high
: PIN22 pull high, PIN23 pull low
: PIN22 pull high, PIN23 pull high
ROM ONLY Mode
EP Mode
EEPROM Mode
CRT Port
⽫
⽫⽫
⽫
H=3
PN:6-20-14X00-015
24 mil
1210
From EC
RTD2168 Slave Address:
0x64/0x65
Pin2, Pin3 should be connected to EC for EP mode
I2C protocol is used
EP Mode
POWER
Select VCCK_V12 source from external 1.2V or embedded LDO
Embedded LDO
LDO_EN(PIN21)
01
VCCK_V12 fromVCCK_V12 from
Embedded LDOExternal 1.2V
VGA_HPD
AUX_CH_N
AUX_CH_P
LANE1_P
LANE1_N
LANE0_P
LANE0_N
DDC_CLK
DDC_DATA
DAC_VSYNC
DAC_HSYNC
CIIC_SCL
CIIC_SDA
VDD_DAC_33
VCCK_V12_VGA
LDO_EN
POL1_SDA
POL2_SCL
VGA_HPD
LANE0_N
LANE1_P
LANE1_N
AUX_CH_N
AUX_CH_P
AVCC33_VGA
VCCK_V12_VGA
DAC_R
POL1_SDA
POL2_SCL
DAC_G
DAC_B
FRED
FGRN
FBLU
DAC_G
DAC_B
DAC_R
DDC_DATA
DDC_CLK
DAC_HSYNC_R
DAC_VSYNC_RVGA_VSYNC
VGA_HSYNC
LANE0_P
CIIC_SCL
CIIC_SDA
DAC_HSYNC_RDAC_HSYNC
DAC_VSYNC DAC_VSYNC_R
AVCC33_VGA
VDD_DAC_33
LDO_EN
3.3VS3.3VS
3.3VS
GND GNDGNDGND
GND
GNDGND GND GNDGND
5VS5VS_CRT
3.3VS
5VS_CRT
5VS_CRT
3.3VS
3.3VS
3.3VS
VGA_AUXN[3]
VGA_AUXP[3]
VGA_TXP_0[3]
VGA_TXN_0[3]
VGA_TXP_1[3]
VGA_TXN_1[3]
VGA_HPD[3]
DDC_CLK[12]
DDC_DATA[12]
DAC_VSYNC[12]
DAC_HSYNC[12]
DAC_G [12]
DAC_B [12]
DAC_R [12]
DDC_DATA [12]
DDC_CLK [12]
DAC_G[12]
DAC_R[12]
DAC_B[12]
SMD_EDO_DAT[11,20,33,34]
SMC_EDP_CLK[11,20,33,34]
DAC_HSYNC[12]
DAC_VSYNC[12]
Title
Size Document Number Rev
Date: Sheet
of
6-71-W51L0-D02
1.0
[12] RTD2168-CG(eDP to CRT), CRT
Custom
12 37Tuesday, June 09, 2015
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
Title
Size Document Number Rev
Date: Sheet
of
6-71-W51L0-D02
1.0
[12] RTD2168-CG(eDP to CRT), CRT
Custom
12 37Tuesday, June 09, 2015
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
Title
Size Document Number Rev
Date: Sheet
of
6-71-W51L0-D02
1.0
[12] RTD2168-CG(eDP to CRT), CRT
Custom
12 37Tuesday, June 09, 2015
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
C305
10p_50V_NPO_04
R424 4.7K_04
U16
SN74AHC1G125DCKR
1
2
5
4
3
R57 75_1%_04
C330
0.1u_16V_Y5V_04
C71
10u_6.3V_X5R_06
R42812K_1%_04
C6
15p_50V_NPO_04
C22
*1u_6.3V_X5R_04
L5
HCB1005KF-121T20
C332
0.01u_50V_X7R_04
C53 0.1u_10V_X5R_04
C13
15p_50V_NPO_04
C48
0.1u_16V_Y5V_04
R89 *4.7K_04
U15
SN74AHC1G125DCKR
1
2
5
4
3
R419
*4.7K_04
C309
1000p_50V_X7R_04
R420 4.7K_04
C50 0.1u_10V_X5R_04
R407
2.2K_04
C18
10u_6.3V_X5R_06
C31
0.1u_16V_Y5V_04
R403 36
C10
15p_50V_NPO_04
C12
15p_50V_NPO_04
L2 FCM1005MF-600T01
RTD2168
U2
RTD2168-CG
LANE1N
32
HPD
1
SMB_SCL
2
SMB_SDA
3
VGA_SCL
4
DVCC_33
5
VGA_SDA
6
VSYNC
7
HSYNC
8
VDD_DAC_33
9
BLUE_P
10
BLUE_N
11
GREEN_N
13
GND_DAC
14
RED_P
15
RED_N
16
XO
18
DVCC_33
20
VCCK_12
19
LANE1P
31
LANE0N
30
LANE0P
29
RRX
28
XI/CKIN
17
AUX_N
27
AUX_P
26
AVCC_12
25
AVCC_33
24
POL2_SCL
23
POL1_SDA
22
LDO_EN
21
GREEN_P
12
EPAD_GND
33
D19
RB751S-40C2
AC
R23 *0_04
R10
2.2K_04
C49 0.1u_10V_X5R_04
C328
2.2u_6.3V_X5R_04
R421 *4.7K_04
R396 36
R427 *100K_04
L4
HCB1005KF-121T20
R16 *0_04
C54 0.1u_10V_X5R_04
C52 0.1u_10V_X5R_04
C58
*1u_6.3V_X5R_04
C51 0.1u_10V_X5R_04
R17
4.7K_04
C299
10p_50V_NPO_04
R423 *4.7K_04
R98 *4.7K_04
C21
0.1u_16V_Y5V_04
C8
15p_50V_NPO_04
R55 75_1%_04
R422
4.7K_04
J_CRT1
DS15146BAC067
8
7
6
5
4
3
2
1
9
10
11
12
13
14
15
GND2
GND1
L1 FCM1005MF-600T01
C2
1000p_50V_X7R_04
R24
4.7K_04
L3 FCM1005MF- 600T01
C47
0.1u_16V_Y5V_04
C3
15p_50V_NPO_04
R56 75_1%_04
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