Clevo W950LU - Power Sequence

Schematic Diagrams
B - 40 Power Sequence
B.Schematic Diagrams
Power Sequence
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RTCVCC
RTC_RST#
VDD5
VDD3
VDD1.8
1.05VA
DMFWP!DP/!!ᙔϺႝတ
1.15VA
1.8VA
SUSC#_N
5V
3.3V
1.35V(VDDQ)
DDR1.35V_PWRGD
SUSB#_N
5VS
1.5VS
3.3VS
VDDQ
VTT_MEM
VGG
ALL_SYS_PWRGD
DDR1.35V_PWRGD
DELAY_ALL_SYS_PWRGD
VCORE
DRAM_CORE_PWROK_R
G3-->S5
S5-->S4
S4-->S3
S3-->S0
PWR_BTN#_R
969us
2.998ms
5.35ms
1.24VA
8.094ms
RSMRST#
10.75ms
3.3V_PRIME
13.16ms
390.75us
737.375us
1.769ms
446.75us
39.485us
2.004ms
SLP_S0IX
34.375us
215.15us
3.286ms
119ms
CORE_PWROK
120.475ms
PLT_RST#_N
Title
Size Document Number Rev
Date: Sheet
of
6-71-W94L0-D02
2.0
[40] POWER UP SEQUENCE
Custom
39 39Thursday, March 19, 2015
Title
Size Document Number Rev
Date: Sheet
of
6-71-W94L0-D02
2.0
[40] POWER UP SEQUENCE
Custom
39 39Thursday, March 19, 2015
Title
Size Document Number Rev
Date: Sheet
of
6-71-W94L0-D02
2.0
[40] POWER UP SEQUENCE
Custom
39 39Thursday, March 19, 2015
Sheet 39 of 39
Power Sequence