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Clevo X7200 - Clock Buffer ICS9 DB403 GLFT

Clevo X7200
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Schematic Diagrams
Clock Buffer ICS9DB403GLFT B - 21
B.Schematic Diagrams
Clock Buffer ICS9DB403GLFT
R456 475_1%_04
PC IE_D I F_2
PC IE_D I F_2#
PCIE_CLK_BUFFER#19
PCIE_CLK_BUFFER19
C150
10u_10V_Y5V_08
C148
0.1u_10V_X7R_04
CLK_HDMI_IN
CLK_HDMI_IN#
C151
10u_10V_Y5V_08
DIF_5#
DIF_5
PCIE_CLK_ROBSON#
PCIE_DIF_2#
PCIE_CLK_ROBSON
PCIE_DIF_2
C153
0.1u_10V_X7R_04
X9
*32.768KHz
14
3 2
OE_IN V
R457
10K_ 04
Z2017
3VS
Z2010
OE_INV
R460
*10K_04
Co-layout
RP4 4P2R_33_04
1
2 3
4
RP3 4P2R_33_04
1
2 3
4
PCIE_DIF_5
PCIE_DIF_5#
RP1 4P2R_33_04
1
2 3
4
TPM _B A DD
Z2011
TPM _P D # Z2008
SUS_ST#
Z2015
Z2012
Z2016
Z2006
Z2009
CK_PWRGD16,19
HDMI_IN_CLKREQ#34
PCLK_TPM
TPM _P P
3VS
R87
10K_04
PCIE_CLK_ROBSON 34
HDMI_IN_CLKREQ
R105
10K_04
Q22
MTN7002ZHS3
G
DS
3VS
ROBSON_CLKREQ#34
ROBSON_CLKREQ
3VS
3VS
3VS
3VS
TPM _B A D D
3VS
RP2 4P2R_33_04
1
2 3
4
Z2013
Z2014
Z2007
C353
*0.1u_16V_Y5V_04
R603 *0_04
T
U22
*SLB9635TT
LAD3
17
LAD0
26
LAD1
23
LAD2
20
VDD1
10
XT A L I
13
VDD3
24
VDD2
19
LFRAME#
22
LCLK
21
LRESET#
16
SERIRQ
27
CLKRUN#
15
GND_1
4
GND_2
11
GND_3
18
GND_4
25
GPIO
6
GPIO2
2
XTAL O
14
TESTI
8
TESTBI /B ADD
9
PP
7
NC_1
1
NC_2
3
NC_3
12
LPCPD#
28
VSB
5
T
T
C401 *12P_04
R596 *10K_04
R595 *10K_04
C793
*1U_6.3V_04
C790
*0.1u_16V_Y5V_04
T
R605 *10K_04
R574 *33_04
R571 *10K_04
T
C407 *12P_04
X4
*32.768KHz-200
14
3 2
C784 *10p_50V_NPO_04
C354
*0.1u_16V_Y5V_04
R604 *100_04
C794
*0.1u_16V_Y5V_04
R293 *0_04
R597 *10K_04
R572 *0_04
R299
*0_04
R573 *0_04
3VS
3VS
3VS
3V
3VS
3V
LPC_AD316 ,28
PLTRST#12,15,16,21,28
LPC_AD016 ,28
LPC_SIRQ15,28
LPC_FRAME#16,28
LPC_AD116 ,28
PCL K _ TPM19
SUS_ST#16
LPC_AD216 ,28
3V6,12,13,15..17,21,25,28..30,34,35,37..41
VCC 3V A
SCLK 7..9,12,16,19,34,37,38
SDATA 7..9,12,16,19,34,37,38
R461 49.9_1%_04
D03
R463 49.9_1%_04
R479 49.9_1%_04
R480 49.9_1%_04
IREF
R459 49.9_1%_04
R458 49.9_1%_04
R464 49.9_1%_04
R466 49.9_1%_04
U35
ICS9DB403
CLK_IN
2
CLK_IN#
3
OE_I NV
25
OE_1
8
DIF_2#
10
SRC_STOP#
16
BYPASS#/PLL
12
GNDA
27
VDDA
28
GND4
4
VDD2
5
DIF_2
9
VDD24
24
VDD1
1
DIF_1#
7
DIF_1
6
IREF
26
HIGH_BW#
17
PD#
15
SCLK
13
SDATA
14
VDD18
18
VDD11
11
DIF_6
23
DIF_6#
22
DIF_5
20
DIF_5#
19
OE_6
21
R110
10K_04
R106
*10K_04
DIF_2
DIF_2#
R102 1K_04
Z2003
R85 1K_04
Z2004
R470
10K_ 04
R471
*10K_04
PCIE_CLK_BUFFER
R1 09 10K_ 04
PCIE_CLK_BUFFER#
SCLK
SDATA
R481 0_04
PCIE_CLK_ROBSON# 34
HI : ACCESS
LOW : NORMAL
asserted before entering S3
HI : 4E/4F h
LOW : 2E/2F h
TPM_BADD
LPC reset timing:
( Internal PD )
Disable TPM function
TPM_PP
LPCPD# inactive to LRST# inactive 32~96us
TPM 1.2
BYPASS_PLL
CLK_ROBSON#
CLK_ROBSON
C172
0.1u_10V_X7R_04
3VS7..9,12,13,15..19,21..28,30..34,36,37,40,41
C157
0.1u_10V_X7R_04
PCIE_CLK_HDMI_IN#
PCIE_DIF_5
PCIE_CLK_HDMI_IN
PCIE_DIF_5#
C152
0.1u_10V_X7R_04
HIGH_BW
Z2002
Z2001
Clock ZDB ICS9DB403
C156
0.1u_10V_X7R_04
C169
0.1u_10V_X7R_04
C149
0.1u_10V_X7R_04
Q23
MTN7002ZHS3
G
DS
HDMI_IN_CLKREQ
ROBSON_CLKREQ
ROBSON
HDMI-IN
Z2005
BYPASS_PLL HIGH_BW
VCC3V
TPM _P P
L41
HCB2012KF-121T30_08
1 2
PCIE_CLK_HDMI_IN 34
PCIE_CLK_HDMI_IN# 34
L42
HCB2012KF-121T30_08
1 2
Sheet 20 of 52
Clock Buffer
ICS9DB403GLFT

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