Technical Reference Guide
Compaq Deskpro 4000N and 4000S Personal Computers
First Edition - September1997
4-23
4.4 SYSTEM CLOCK DISTRIBUTION
The system uses an ICS9147-08 or compatible part for generation of most clock signals. Tables
4-15 lists the clock signals and to which components they are distributed.
Table 4–15.
Clock Generation and Distribution (Pentium-Based System)
Table 4-15.
Clock Generation and Distribution
Signal Frequency Source Destination
CPUCLK 60/66 MHz [1] ICS9147 CPU, VT82C595
CACHE_CLKn CPUCLK “ L2 SRAMs
DIMMn_CLKn CPUCLK “ DIMMs
PCICLK CPUCLK/2 “ PCI slots
LRU_CLK CPUCLK/2 “ Compaq ASIC
TLAN_CLK CPUCLK/2 “ TLAN ASIC
PCI Bridge Clock CPUCLK/2 “ VT82C595, VT82C586
SIO/USB CLK 48 MHz “ 87307, VT82C586
PHYCLK 25 MHz Crystal LXT970
TLAN 20 MHz “ TLAN ASIC
Crystal CLK 14.318 MHz Crystal ICS9147
CLK_14 14 MHz ICS9147 [2] ISA bus, VT82C586,
ESS1868
BCLK PCICLK/4 [3] VT82C586 ISA bus
NOTES:
[1] Depending on speed configuration (refer to Chapter 3, “Processor/Memory Subsystem”).
[2] Routed through buffer before destination.
[3] 8.33 MHz if PCICLK = 33 MHz, 7.5 MHz if PCICLK = 30 MHz
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