Dell POWEREDGE 4300 - Entering the System Setup Program

5-14 Dell PowerEdge 4300 Systems Installation and Troubleshooting Guide
 You receive the 0HPRU\(&&IDXOWGHWHFWHG message from the Dell Open-
Manage Hardware Instrumentation Package (HIP) server management
application. See Chapter 3, “Messages and Codes,” for more information on this
program.
6\VWHP6HW7HVW*URXS
The subtests in the System Set test group check the computer’s basic system board
components and verify their related functions.
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The subtests that constitute the System Set test group and the computer functions
they confirm follow:

CMOS Confidence Test
Checks the NVRAM for accessibility and reliability of data storage by performing
a data pattern check and verifying the uniqueness of memory addresses.

DMA Controller Test
Tests the direct memory access (DMA) controller and verifies the correct opera-
tion of its page and channel registers by writing patterns to the registers.

Real-Time Clock Test
Confirms the functionality and accuracy of the computer’s real-time clock (RTC).

System Timers Test
Checks the timers used by the microprocessor for event counting, frequency
generation, and other functions. Only the functions that can be activated by soft-
ware are tested.

Interrupt Controller Test
Generates an interrupt on each interrupt request (IRQ) line to verify that devices
using that line can communicate with the microprocessor and that the interrupt
controllers send the correct memory addresses to the microprocessor.

APIC Test
Tests that the procedure used to boot a multiprocessor system is able to properly
receive interrupts from the input/output (I/O) Advanced Peripheral Interrupt
Controller (APIC).

APIC MP Test
Ensures that all microprocessors are able to properly receive interrupts from the
I/O APIC.

System Speaker Test
Checks the functionality of the speaker by generating eight tones.