24
AVR-3801
MM74HC4052N
(AC: IC371, 375)
(RE: IC401)
1
2
V
EE
3
4
5
6
7
8
9
10
11
16
15
14
13
12
Y0
Y2
Y1
INH
Vss
V
DD
X2
X1
X0
A
B
Y-COM
Y3
X-COM
X3
LEVEL
CONVER
-TER
BINARY TO 1 of 4
DECODER WITH INHIBIT
13 X
3 Y
Y3 4
Y2 2
Y1 5
Y0 1
X3 11
X2 15
X1 14
X0 12
V
EE
7
B 9
INH 6
V
SS
8
A 10
V
DD
16
MM74HC4053N
(RE: IC403)
C9
1
2
V
EE
3
4
5
6
7
8
9
10
11
16
15
14
13
12
Y1
Y0
Z-COM
Z0
INH
Vss
V
DD
Y-COM
X-COM
X1
X0
C
A
B
Z1
LEVEL
CONVER
-TER
BINARY TO 1 of 2
DECODER WITH INHIBIT
14 X
Z1 3
Z0 5
Y1 1
Y0 2
X1 13
X0 12
V
EE
7
B10
INH6
Vss8
A11
V
DD
16
15 Y
4 Z
L-LD2
9
L-ch7 to 91decoder
R-ch latch circuit
R-ch7 to 91decoder
10
19
NC
22
NC
3
2
4
5
6
7
8
11
12
13
14
28
27
26
25
24
23
21
20
18
17
16
15
1
NC
L-OUT
NC
L-IN
L-LD1
L-A-GND
NC
CS1
NC
GND
CK
V
SS
V
DD
NC
R-OUT
R-LD1
R-LD2
R-A-GND
NC
CS2
NC
STB
DATA
R-IN
50k
Ω
/
91S
TEP
VR
Same
as L-ch
L-ch latch circuit
Shift register (24Bit)
Level shift circuit
1
28
14
TC9459N
(EX: IC805~809)
SN74HC153NS
(RE: IC705, 706)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1G
B
1C3
1C2
1C1
1C0
1Y
GND
Vcc
2G
A
2C3
2C2
2C1
2C0
2Y
1G
1C3
1C21C1
1C0
1Y
B
B
A
A
2G
2C3
2C22C1
2C0
2Y
B
B
A
A
Europe model only
SAA6579T (CO: IC301)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
QUAL
RDDA
V
REF
MUX
V
SS A
CIN
SCOUT
RDCL
T57
OSCO
OSCI
V
DD D
TEST
MODE
V
DD A
V
SS D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
QUAL
RDDA
V
REF
MUX
V
DD A
V
SS A
CIN
SCOUT
MODE
TEST
V
SS D
V
DD D
OSCI
OSCO
T57
RDCL
Quality indication output.
RDS data output.
Multiplex signal input.
+5V power supply for analog part.
Ground for analog part (0V).
Subcarrier input to comparator.
Subcarrier ouput of reconstruction filter.
Oscillation mode/test control input.
Test enable input.
Ground for digital part (0V).
+5V power supply for digital part.
Oscillator input.
Oscillator output.
57kHz clock signal output.
RDS clock output.
Pin No. Symbol Function
SAA6579T Terminal Function
Europe model only
LC7074M (CO: IC302)
OSC1
GND
GND
RES
CLOCK-IN
DATA-IN
CORR. SEL
CL. ED. SEL
+5V
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
OSC2
GND
CLOCK-OUT
DATA-OUT
DATA START
ERROR
CORRECTION
D S CONTROL
RECEIVE
Reference voltage output (0.5 V
DD A
).