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Denon AVR-X1600H Service Manual

Denon AVR-X1600H
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BY25Q64ASSIG (DIGITAL_DSP : IC782)
1
2
3
4
8
7
6
5
Top View
SOP8 208mil
/CS
SO
/WP
VSS
VCC
/HOLD
SCLK
SI
Pin Name
I/O
Description
/CS I Chip Select
SO (IO1) I/O
Serial Output for single bit data Instructions. IO1 for Dual or Quad
Instructions.
/WP (IO2) I/O
Write Protect in single bit or Dual data Instructions. IO2 in Quad mode.
The signal has an internal pull-up resistor and may be left unconnected
in the host system if not used for Quad Instructions.
VSS Ground
SI (IO0) I/O
Serial Input for single bit data Instructions. IO0 for Dual or Quad
Instructions.
SCLK
I
Serial Clock
/HOLD (IO3) I/O
Hold (pause) serial transfer in single bit or Dual data Instructions. IO3 in
Quad-I/O mode. The signal has an internal pull-up resistor and may be
left unconnected in the host system if not used for Quad Instructions.
VCC Core and I/O Power Supply
M12L64164A-5TG2Y (DIGITAL_DSP : IC784)
Block diagram
A3V64S40GTP
64M Single Data Rate Synchronous DRAM
Revision 1.0 Dec., 2012
Page 2/39
CLK : Master Clock U,LDQM : Output Disable / Write Mask
CKE : Clock Enable A0-11 : Address Input
/CS : Chip Select BA0,1 : Bank Address
/RAS : Row Address Strobe Vdd : Power Supply
/CAS : Column Address Strobe VddQ : Power Supply for Output
/WE : Write Enable Vss : Ground
DQ0-15 : Data I/O VssQ : Ground for Output
BA0
BA1
Vdd
DQ0
VddQ
DQ1
DQ2
VssQ
DQ3
DQ4
VddQ
DQ5
DQ6
VssQ
DQ7
Vdd
LDQM
/WE
/CAS
/RAS
/CS
A10(AP)
A2
A3
Vdd
A0
A1
Vss
DQ15
VssQ
DQ14
DQ13
VddQ
DQ12
DQ11
VssQ
DQ10
DQ9
VddQ
DQ8
Vss
NC
UDQM
CLK
CKE
NC
A11
A8
A7
A6
A5
A4
Vss
A9
PIN CONFIGURATION (TOP VIEW)
PIN CONFIGURATION
(TOP VIEW)
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ESMT
M12L64164A (2Y)
Elite Semiconductor Memory Technology Inc. Publication Date: May 2012
Revision: 1.1 2/45
FUNCTIONAL BLOCK DIAGRAM
PIN FUNCTION DESCRIPTION
PIN NAME INPUT FUNCTION
CLK System Clock Active on the positive going edge to sample all inputs
CS
Chip Select
Disables or enables device operation by masking or enabling all
inputs except CLK , CKE and L(U)DQM
CKE Clock Enable
Masks system clock to freeze operation from the next clock cycle.
CKE should be enabled at least one cycle prior new command.
Disable input buffers for power down in standby.
A0 ~ A11 Address
Row / column address are multiplexed on the same pins.
Row address : RA0~RA11, column address : CA0~CA7
BA1 , BA0 Bank Select Address
Selects bank to be activated during row address latch time.
Selects bank for read / write during column address latch time.
RAS
Row Address Strobe
Latches row addresses on the positive going edge of the CLK with
RAS low.
Enables row access & precharge.
CAS
Column Address Strobe
Latches column address on the positive going edge of the CLK with
CAS low.
Enables column access.
WE
Write Enable
Enables write operation and row precharge.
Latches data in starting from CAS ,
WE active.
L(U)DQM Data Input / Output Mask
Makes data output Hi-Z, t
SHZ after the clock and masks the output.
Blocks data input when L(U)DQM active.
DQ0 ~ DQ15 Data Input / Output Data inputs / outputs are multiplexed on the same pins.
VDD / VSS Power Supply / Ground Power and ground for the input buffers and the core logic.
VDDQ / VSSQ Data Output Power / Ground
Isolated power supply and ground for the output buffers to provide
improved noise immunity.
NC No Connection This pin is recommended to be left No Connection on the device.
L(U)DQM
DQ
Mode
Register
Control Logic
Column
Address
Buffer
&
Refresh
Counter
Row
Address
Buffer
&
Refresh
Counter
Bank D
Row Decoder
Bank A
Bank B
Bank C
Sense Amplifier
Column Decoder
Data Control Circuit
Latch Circuit
Input & Output
Buffer
Address
Clock
Generator
CLK
CKE
Command Decoder
CS
RAS
CAS
WE
Before Servicing
This Unit
Electrical Mechanical Repair Information Updating
53

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Denon AVR-X1600H Specifications

General IconGeneral
Receiver typeSurround
Frequency range10 - 100000 Hz
Output impedance4 - 16 Ω
Input sensitivity200 mV
Audio output channels7.1 channels
Signal-to-Noise Ratio (SNR)98 dB
Power output per channel (1KHz@6 Ohm)145 W
Power output per channel (20-20KHz@8 Ohm)80 W
HDMI in6
AC (power) inYes
Composite video in2
Digital audio coaxial in0
Ethernet LAN (RJ-45) ports1
Connectivity technologyWired & Wireless
Speakers connectivity typeClamp terminals
Display-
HDCP version2.2
Apple dockingNo
Product colorBlack
Audio decodersDTS:X, Dolby Atmos, Dolby Surround, Dolby TrueHD
Audio formats supportedAAC, ALAC, DSD, FLAC, MP3, WAV, WMA
Bluetooth version4.1
Bluetooth profilesA2DP, AVRCP
AM band range520 - 1611 kHz
FM band range87.5 - 108 MHz
Supported radio bandsAM, FM
Internet radio services supportedAmazon Music, Deezer, Pandora, Spotify, Tidal, TuneIn
AC input voltage230 V
AC input frequency50 Hz
Power consumption (standby)0.1 W
Power consumption (typical)440 W
Operating temperature (T-T)5 - 35 °C
Package weight10600 g
CertificationCE
Package depth435 mm
Package width523 mm
Package height232 mm
Weight and Dimensions IconWeight and Dimensions
Depth339 mm
Width434 mm
Height215 mm
Weight8600 g

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