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Denon DCD-1420 - CXD1125 Q Terminal Functions; CXD1125 Q Terminal Function Descriptions

Denon DCD-1420
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CXD11250
Terminal
Function
Terminal
No.
Terminal
Symbol
Terminal
Function
1
FSW
Output
to
shift
time
constant
of
output
filter
for
spindle
motor.
WIN
MON
MDP
ON/OFF
contro!
output
for
spindle
motor.
Drive
output
for
spindle
motor.
Rough
control
at
CLV-S
mode
and
phase
contro!
at
CLV-P
mode.
12)
Drive
output
for
spindle
motor.
Speed
control
at
CLV-P
mode.
Input
of
EFM
signal
from
RF
amplifier.
Output
to
control
slice
level
of
EFM
signal.
Sampling
GFS
signal
by
WFCK/16
and
if
it
is
‘‘H'’,
delivers
‘’H”’;
if
it
is
continuously
““L”
8
times,
delivers
“’L’’.
“|
vco
output.
When
EFM
signal
is
locked,
f=8.6436
MHz.
VCO
input.
O};/OlmaI
In
ala]
&
ater
(OV).
Phase
comparing
output
for
EFM
signal
and
VCO/2.
GND
(OV).
;
Serial
data
transfer
clock
input
from
CPU.
Latches
data
by
rising
edge
of
clock.
Input
of
Latch
from
CPU.
Latches
8-bit
shift
register
data
(serial
data
from
CPU)
to
each
register.
Input
of
serial
data
from
CPU.
System
reset
input.
Resets
at
‘’L’’.
Input
of
tracking
pulse.
Answer
to
address,
output
internal
condition.
Input
of
muting.
When
internal
register
A’s
ATTM
is
in
“L”,
and
MUTG
is
in
“L"
for
normal
condition;
"H”
for
no
sound
condition.
Output
of
CRC
check
result
of
sub-code
Q.
Clock
input
for
serial
output
of
sub-code.
Serial
output
of
sub-code.
Q
output
of
sub-code.
Output
of
sub-code
sync.
SO
+
$1.
Reading
clock
of
sub-cade
Q.
Selection
input
of
SQCK.
Digital
out
output.
(When
CXD1130Q
or
DO
is
OFF,
output
WFCK.)
Output
of
indication
for
frame
sync
lock
condition.
1/0
=
Data
terminal
of
external
RAM.
DATAS8
(MSB).
1/0
1/0
Data
terminal
of
external
RAM.
DATA7.
Data
terminal
of
external
RAM.
DATA6.
1/0
Data
terminal
of
external
RAM.
DATAS.
Power
supply
(+5V).
1/0
Data
terminal
of
external
RAM.
DATA4.
1/0
.
Data
terminal
of
external
RAM.
DATAS.
1/0
1/0
Data
terminal
of
external
RAM.
DATA2.
Data
terminal
of
external
RAM.
DATA
(LSB).
O
|
Address
output
of
external
RAM.
ADDRO1
(LSB).
O
Address
output
of
external
RAM,
ADDRO2.
Address
output
of
externa!
RAM.
ADDRO3.
Address
output
of
external
RAM.
ADDR0O4.
+—
Address
output
of
externa!
RAM.
ADDRO5.
Address
output
of
external
RAM.
ADDRO6.
Address
output
of
external
RAM.
ADDRO7.
Address
output
of
external
RAM.
ADDRO8.

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