Denon DCD-315 - Page 22

Zam DCO-315
PCM1710U
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PCNM1710U Terminal Function
| PinNo. | Symbol —|_-V/O_|
rs 4. {~~ LRCIN_|_1 _| Reference sample rate clock input (fs).
Pe ee DING p
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[xT
| xTO_
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Function
Data bit clock input.
Osc, buffer (XT! inverting) output.
Osc, input* (external clock input).
s
Digital ground.
Digital power supply (+5V).
Rch analog DAC power supply (+5V).
Rch analog DAC ground.
| Reh amplifiercommonoutpu.
[Rehamplifierbiasoutpu
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P10 | AGND2R |
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Pi3,| ~vouTR | __—i'| Achvoltageoutput. CC Cd
Po i4 | ~~ AGND. | sd Analogground. = —“Csi‘“C;CsSCS*SCSC~idCY
Ps [| )~SSVCC CWT ~C*d| Analogpowersupply(+5V). Cd
Pie |) VOuTL. S| ~—s| Lchvoltageoutput. = =—— ( C—“‘“‘SNNC*C‘isC
Pi |) EXT2L ~~] sd Lchamplifierbiasoutput.
Pig |S EXTIL ~——Ci|_~—s| Lchamplifiercommonoutput.
|19 | AGND2L_ |__| Lch analog DAC ground.
| 20 | ~~ vccet _| _| tch analog DAC power supply (+5V).
Pai |= CVdd ~—Ss|SC*|«CDigitalpowersupply(+5V). Cd
| 2 |__| _Digi
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CKSL
| MODE
MUTE
MD/DM1
[| Operation mode selection (H/Serial)
[| Mute control signal (H:OFF,L:ON)
[| Control data at seriaVDe-emphasis atparallel
| _ MC/DM2__| | Control bit clock at seria/De-emphasis atparaliel.
[| MU/DSD_| | Control data wode at serial/Double speed at parallel,
* If XTI input signal is from external clock, XTO terminal must be in OFF status. Al! input terminal with pull up resister.
DGND
System clock selection H: 384 fs L: 256 fs
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