Denon DNP-800NE - Page 28

PCM9211 BLOCK DIAGRAM
Clock/ Data
Recovery
MPIO_A
SELECTOR
MPIO_C
SELECTOR
MPIO _B
SELECTOR
ADC
Com. Supply
MPO0/1
SELECTOR
MPO 0
MPO 1
MAIN
OUTPUT
SCKO
BCK
LRCK
DOUT
PORT
RXIN8
RXIN9
RXIN10
RXIN11
DITOUT
AUTO
DIR
ADC
AUXIN0
AUXIN1
AUXIN2
AUTO
DIR
ADC
AUXIN0
AUXIN1
AUXIN2
AUTO
DIR
ADC
AUXIN0
AUXIN1
DIT
Lock:DIR
Unlock:ADC
AUXIN 2
AUXOUT
OSC
Divider
XMCKO
Divider
XMCKO
DITOUT
RECOUT0
RECOUT1
AUXIN 0
AUXIN1
ADC Standalone
ADC Mode
Control
Function
Control
REGISTER
POWER SUPPLY
MC /SCL
MDI /SDA
MDO /ADR0
MS/ADR 1
FILT
PLL
DIR
Lock Detection
ERROR /INT0
NPCM /INT1
ADC Clock
(SCK/BCK /LRCK)
(To MPIO_A & MPO0/ 1 )
ADC
MODE
DIR CS
(48-bit )
DIT CS
(48-bit )
DIR Interrupt
GPIO/GPO
Data
MPIO_A
MPIO_B
MPIO_C
MPO0
MPO1
Divider
(to MPIO_A )
Secondary BCK/ LRCK
Selector
RECOUT0
RECOUT1
SBCK /SLRCK
DOUT
RXIN7
SCKO/BCK/LRCK
RXIN 0
RXIN 1
RXIN 2
RXIN 4/ASCKI 0
RXIN 3
RXIN 5/ABCKI 0
RXIN 6/ALRCKI 0
RXIN 7/ADIN 0 RXIN 7
RXIN6
RXIN5
RXIN4
RXIN3
RXIN2
RXIN1
RXIN0
MPIO_A0
MPIO_A1
MPIO_A2
MPIO_A3
VINL
VINR
VCOM
MPIO _C 0
MPIO _C 1
MPIO _C 2
MPIO _C 3
XTI
XTO
AGND VDDRX GNDRX DVDDVCCAD AGNDAD DGNDVCC
ADC
ANALOG
DIR
ANALOG
ALL
DIR
ANALOG
SPI/I C
INTERFACE
2
Reset
and Mode
Set
All Port
f Calculator
S
DIR
f Calculator
S
DIR
P and P
CD
EXTRA DIR FUNCTIONS
f Calculator
S
ERROR DETECTION
Non-PCM DETECTION
Flags
DTS-CD/LD Detection
Validity Flag
User Data
Channel Status Data
BFRAME Detection
Interrupt System
MPIO_B3
MPIO_B2
MPIO_B1
MPIO_B0
RST
PCM9211
www.ti.com SBAS495 –JUNE 2010
BLOCK DIAGRAM
Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): PCM9211
PCM1795 (MAIN(Audio) : IC508）
Block Diagram
Pin Discriptions
PIN CONFIGURATION
ZEROL
ZEROR
MSEL
LRCK
DATA
BCK
SCL
DGND
V
DD
MS
MDI
MC
MDO
RST
V 2L
CC
AGND3L
IL
OUT
I L+
OUT
AGND2
V1
CC
VL
COM
VR
COM
I
REF
AGND1
IR
OUT
I R+
OUT
AGND3R
V 2R
CC
1 2 3 4 5 6 7 8 9
10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
PCM1795
www.ti.com
........................................................................................................................................................................................................ SLES248– MAY 2009
DB PACKAGE
SSOP-28
(TOP VIEW)
Table 1. TERMINAL FUNCTIONS
TERMINAL
NAME NO. I/O DESCRIPTION
AGND1 19 — Analog ground (internal bias) AGND2 24 — Analog ground (internal bias) AGND3L 27 — Analog ground (left channel DACFF)
AGND3R 16 — Analog ground (right channel DACFF) BCK 6 I Bit clock input
(1)
DATA 5 I Serial audio data input
(2)
DGND 8 — Digital ground
I
OUT
L+ 25 O Left channel analog current output+
I
OUT
L– 26 O Left channel analog current output–
I
OUT
R+ 17 O Right channel analog current output+
I
OUT
R– 18 O Right channel analog current output–
I
REF
20 — Output current reference bias pin
LRCK 4 I Left and right clock (f
S
) input
(2)
MC 12 I Mode control clock input
(2)
MDI 11 I Mode control data input
(2)
MDO 13 I/O Mode control readback data output
(3)
MS 10 I/OI Mode control chip-select input
(4)
; active low
MSEL 3 I I
2
C/SPI select
(2)
; active low SPI select
RST 14 I Reset
(2)
; active low
(1) Schmitt-trigger input, 5-V tolerant.
(2) Schmitt-trigger input, 5-V tolerant.
(3) Schmitt-trigger input and output. 5-V tolerant input. In I
2
C mode, this pin becomes an open-drain 3-state output; otherwise, this pin is a
CMOS output.
(4) Schmitt-trigger input and output. 5-V tolerant input and CMOS output.
Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): PCM1795
FUNCTIONAL BLOCK DIAGRAM
PowerSupply
RST
SCK
Advanced
Segment
DAC
Modulator
I
OUT
L+
I
OUT
L
I
OUT
R
I
OUT
R+
Bias
andV
REF
V
COM
L
V
COM
R
AGND2
V
DD
V
CC
1
V
CC
2L
V
CC
2R
AGND1
I/V andFilter
x8
Oversampling
DigitalFilter
and
FunctionControl
Audio
DataInput
I/F
LRCK
BCK
D ATA
MDO
MDI
MC
MS
AGND3L
AGND3R
DGND
Current
Segment
DAC
I
REF
V
OUT
L
I/VandFilter
V
OUT
R
Function
ControlI/F
MSEL
Zero
Detect
ZEROL
ZEROR
System
Clock
Manager
Current
Segment
DAC
PCM1795
SLES248–MAY 2009 ........................................................................................................................................................................................................ www.ti.com
6 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): PCM1795
PIN CONFIGURATION
ZEROL
ZEROR
MSEL
LRCK
DATA
BCK
SCL
DGND
V
DD
MS
MDI
MC
MDO
RST
V 2L
CC
AGND3L
IL
OUT
I L+
OUT
AGND2
V1
CC
VL
COM
VR
COM
I
REF
AGND1
IR
OUT
I R+
OUT
AGND3R
V 2R
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PCM1795
www.ti.com ........................................................................................................................................................................................................ SLES248 – MAY 2009
DB PACKAGE
SSOP-28
(TOP VIEW)
Table 1. TERMINAL FUNCTIONS
TERMINAL
NAME NO. I/O DESCRIPTION
AGND1 19 — Analog ground (internal bias)
AGND2 24 — Analog ground (internal bias)
AGND3L 27 — Analog ground (left channel DACFF)
AGND3R 16 — Analog ground (right channel DACFF)
BCK 6 I Bit clock input
(1)
DATA 5 I Serial audio data input
(2)
DGND 8 — Digital ground
I
OUT
L+ 25 O Left channel analog current output+
I
OUT
L– 26 O Left channel analog current output–
I
OUT
R+ 17 O Right channel analog current output+
I
OUT
R– 18 O Right channel analog current output–
I
REF
20 — Output current reference bias pin
LRCK 4 I Left and right clock (f
S
) input
(2)
MC 12 I Mode control clock input
(2)
MDI 11 I Mode control data input
(2)
MDO 13 I/O Mode control readback data output
(3)
MS 10 I/OI Mode control chip-select input
(4)
; active low
MSEL 3 I I
2
C/SPI select
(2)
; active low SPI select
RST 14 I Reset
(2)
; active low
(1) Schmitt-trigger input, 5-V tolerant.
(2) Schmitt-trigger input, 5-V tolerant.
(3) Schmitt-trigger input and output. 5-V tolerant input. In I
2
C mode, this pin becomes an open-drain 3-state output; otherwise, this pin is a
CMOS output.
(4) Schmitt-trigger input and output. 5-V tolerant input and CMOS output.
Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): PCM1795
Before Servicing
This Unit
Electrical Mechanical Repair Information Updating
28