H61H2-I5 USER MANUAL
30
Chapter 2
Row Refresh Cycle Time (tRFC) (74)
This item specifies the row refresh cycle time.
Active to Active Delay (tRRDmin) (4)
This item controls the ACTIVE bank x to ACTIVE bank y in memory clock cycles.
Write to Read Delay (twTR) (5)
This item specifies the write to read delay time.
Write Recovery Time (tWR) (10)
This item specifies the write recovery time.
RAS# to CAS# Delay (tRCD) (9)
This item specifies the RAS# to CAS# delay to Rd/Wr command to the same bank.
Row Precharge Time (tRP) (9)
This item specifies Row precharge to Active or Auto-Refresh of the same bank.
RAS# Active Time (tRAS) (24)
This item specifies the RAS# active time.
Aptio Setup Utility - Copyright (C) 2012 American Megatrends, Inc.
Version 2.15.1229. Copyright (C) 2012, American Megatrends, Inc.
The selection of Performance
Memory Profiles which impacts
memory sizing behavior.
Main Advanced Chipset M.I.B III Boot Security Exit
fChipset OverClocking Configuration
Scroll to this item to view the following screen:
Memory Multiplier Configuration
Performance Memory Profiles [Automatic]
Memory Timing Configuration
CAS# Latency (tCL) 9
RAS# to CAS# Delay (tRCD) 9
Row Precharge Time (tRP) 9
RAS# Active Time ( tRAS) 24
Write Recovery Time (tWR) 10
Row Refresh Cycle Time (tRFC) 74
Active to Active Delay (tRRD) 4
Write to Read Delay (tWTR) 5
Read CAS# Precharge (tRTP) 5
Four Active Window Delay (tFAW) 20
CAS Latency (tCL) (9)
This item determines the operation of DDR SDRAM memory CAS (colulmn address
strobe). It is recommended that you leave this item at the default value. The 2T
setting requires faster memory that specifically supports this mode.
F2:Previous Values
F1:General Help
+/- : Change Opt.
Enter : Select
lk
mn
:Select Screen
:Select Item
F3:Optimized Defaults
F4:Save & Exit
ESC:Exit
Performance Memory Profiles (Automatic)
This item enables you to set the Performance Memory Profile.
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General
Weight and Dimensions
