7-4
DTV Module Block Diagram
A81N0BLDTV
IC101 (DTV SIGNAL PROCESS)
IC252
(AUDIO D/A CONVERTER)
IC202 (FLASH MEMORY)
ADC
/AGC I/F
DIGITAL SIGNAL
PROCESS
SYSTEM DECODER
/VIDEO DECODER
/VIDEO FORMAT
CONVERTER
/2D GRAPHICS
TU61
(TUNER UNIT)
DIF-OUT1
CN61 CN102
LPF
DIF-OUT2
DIF-AGC
SDA
SCL
DTV MODULE CBA UNIT
MAIN CBA
VIDEO SIGNAL
26 11
DIF-OUT1
27 12
DIF-OUT2
24 9
DIF-AGC
18 33DTV-Y
19 34DTV-Pr
20 35DTV-Pb
15 30
DTV-AUDIO(L)
16 31
DTV-AUDIO(R)
10
11
8
174
178 182
187
186
159
158
162
161
6
5 15
14
7
8
156
144
143
140
41
XIN-25MHz
XOUT-25MHz
25MHz
OSC
X281
4
5
VIDEO
ENCODER
AUDIO
DECODER
AUDIO
D/A
CONVERTER
SDRAM
I/F
FLASH
MEMORY
I/F
IC201 (DDR SDRAM)
22DTV-SPDIF
14 14SDA
15 15SCL
4
5
55TU-SDA
44TU-SCL
CN61
L-CH
R-CH
SDA
SCL
BUS-CONT
*1
*1 79~81,85,87,89~91,92,94,96~98,
102,104,106
*2
*2 55,56,58,60,61,116,119,120,124,
125,127,129,130
*3
*3 1,2,7~12,20,206,209,211,213~216,
*4
*4 23~25,27,29,32~36,41~44,47,48,50,
52~54,205
*5
*5 1~9,16~25,48
*6
*6 29~36,38~45
*7
*7 28~32,35~42
*8
*8 2,4,5,7,8,10,11,13,54,56,57,59,60,
62,63,65
TO IF/VIDEO
BLOCK
DIAGRAM
TO AUDIO
BLOCK
DIAGRAM
TO SYSTEM
CONTROL
BLOCK
DIAGRAM
CN61CN101
BUFFER
Q243
BUFFER
Q245
BUFFER
Q244
BUFFER
Q251
SDA
SCL
DATA BUS(0-15)
ADDRESS BUS(0-12)
DATA BUS(0-15)
ADDRESS BUS(1-20)
CN102
DDR SDRAM
FLASH MEMORY
SW
SW
DTV-SPDIF
DTV-AUDIO(L)
DTV-AUDIO(R)
DTV-Pb
DTV-Pr
DTV-Y
Q211
Q212
Q213
Q214
AUDIO SIGNAL
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