Foxconn H61MXL Series - North Bridge Configuration

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North Bridge Conguration
► Memory Multiplier
This item is used to adjust the memory Clock Ratio. The available settimgs are: [10.67],
[13.33],[16],[18.67],[21.33].
► CAS# Latency (tCL)
The number of memory clocks it takes a DRAM to return data after the read CAS_L is assert-
ed depends on the memory clock frequency. The value that BIOS programs into the memory
controller is a function of the target clock frequency. The target clock frequency is determined
from the supported CAS latencies at given clock frequencies of each DIMM.
► Row Precharge Time (tRP)
This item allows you to select the row precharge time (in clock cycles).
► RAS# to CAS# Delay (tRCD)
This item allows you to select a delay time (in clock cycles) between the CAS# and RAS#
strobe signals.
► RAS# Active Time (tRAS)
This item allows you to set the minimum RAS# active time (in clock cycles).
► Write Recovery Time (tWR)
This item allows you to select the write recovery time (in clock cycles).
► Row Refresh Cycle Time (tRFC)
Refresh to Refresh or Refresh to Active command interval.
► Write to Read Delay (tWTR)
This item allows you to select a delay time (in clock cycles) between sending the last data from
a write operation to the memory and issuing a read command.
► Active-to-Active Delay (tRRD)
This item allows you to select a delay time (in clock cycles) between the RAS# and RAS#
strobe signals.
Version 2.11.1210. Copyright (C) 2011 American Megatrends, Inc.
Aptio Setup Utility - Copyright (C) 2011 American Megatrends, Inc.
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Memory Multiplier Configuration
Memory Multiplier [13.33]
Memory Timing Configuration
CAS# Latency(tCL) 9
Row Precharge Time(tRP) 9
RAS# to CAS# Delay(tRCD) 9
RAS# Active Time(tRAS) 24
Write Recovery Time(tWR) 10
Row Refresh Cycle Time(tRFC) 74
Write to Read Delay(tWTR) 5
Active to Active Delay(tRRD) 4
Read CAS# Precharege(tRTP) 5
Four Active Window Delay(tFAW) 20
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F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
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