System Hardware Installation - 35 -
3-6-4 Processor and Memory Module Matrix Table
4 DIMM
Memory Q’ty
1 DIMM
2 DIMM
8 DIMM
CPU0
B0 A0 D0 C0 G0 H0 E0 F0
V
V V
VVVV
VV V V VVVV
NOTE!
l
ThereshouldbeatleastoneDDR4DIMMpersocket.
l
IfonlyoneDIMMispopulatedinachannel,thenpopulateitintheslotfurthestawayfromCPUofthatchannel.
l
Channel0'soneachmemorycontrollermustbepopulatedwithsametotalcapacityperchannel
(ifpopulated).