GOWIN GW1N Series Programming And Configuraion Guide

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Gowin FPGA Products

Programming and Configuraion Guide

UG290-1.04E, 8/8/2018

Table of Contents4
List of Figures6
About this Guide8
Purpose8
Supported Products8
Related Documents8
Abbreviations and Terminology9
Support and Feedback9
Table 1-1 Abbreviations and Terminology9
Glossary10
Table 2-1 Glossary10
Configuration Mode and Power-On Requirements12
GW1N(R/S) Series of FPGA Products12
Configuration Modes13
Power Supply Voltage13
Table 3-1 Configuration Modes13
GW2A(R) Series of FPGA Products14
Configuration Modes14
Table3-2 Recommended Power Supply Voltage14
Table 3-3 Configuration Modes14
Power Supply Voltage15
Table3-4 Recommended Power Supply Voltage15
Configuration Pin16
Configuration Pin List and Reuse Options16
Pin Multiplexing17
Table 4-1 Configuration Pin List17
Table 4-2 Pin Reuse Options18
Pin Function and Application19
Figure 4-1 Configuring Pin Reuse19
Table 4-3 Pin Function19
Figure 4-2 MCLK Frequency Setting24
Configuration Mode25
Configuration Notes26
Figure 5-1 Recommended Pin Connection27
Figure 5-2 Power Recycle Timing28
Table 5-1Corresponding MODE Value28
Figure 5-3 Trigger Timing29
Table 5-2 Timing Parameters for Cycling Power and RECONFIG_N Trigger29
Table 5-3 Timing Parameters for Cycling Power and RECONFIG_N Trigger29
JTAG Configuration30
Table 5-4 Pin Description in JTAG Configuration Mode30
Figure 5-4 Connection Diagram for the JTAG Configuration Mode31
Figure 5-5 Connection Diagram of JTAG Daisy-Chain Configuration Mode32
Figure5-6 JTAG Configuration Timing32
Table 5-5 JTAG Configuration Timing Parameters32
AUTO BOOT Configuration (Supported by GW1N(R/S) Only)33
Sspi34
Figure 5-7 SSPI Configuration Mode Connection Diagram34
Table 5-6 SSPI Mode Pins34
Figure 5-8 SSPI Programming Via External Flash Connection Diagram35
Figure 5-9 JTAG Configuration Timing35
Mspi36
Table 5-7 SSPI Configuration Timing Parameters36
Table 5-8 Pin Description in JTAG Configuration Mode37
Figure 5-10 MSPI Configuration Mode Connection Diagram38
Figure 5-11 Connection Diagram of JTAG Programming External Flash38
Figure 5-12 Input the Start Address for the Next Bitstream40
Figure 5-13 Set the Programming Address for the External Flash41
Figure 5-14 Connection Diagram for Configuring Multi-Chip FPGA Via Single Flash42
Figure5-15 MSPI Download Timing42
Table 5-9 MSPI Configuration Timing Parameters42
AUTO BOOT Configuration (Supported by GW1N(R/S) Only)43
Figure 5-16 Dual Boot Flow Chart44
CPU Mode45
Figure 5-17 Connection Diagram for the CPU Mode45
Table 5-10 CPU Mode Pins45
Serial46
Figure 5-18 Connection Diagram for the SERIAL Mode46
Table 5-11 Pin Definition in SERIAL Configuration Mode46
Bitstream File Configuration48
Configuration Options49
Data Encryption (Supported by GW2A(R) Series Only)49
Figure 6-1 Configuration Options49
Figure 6-2 Encryption Key Setting Method50
Figure 6-3 Setting the Decryption Key51
Configuration File Size52
Figure 6-4Bitstream Format Conversion Tool52
Table 6-1 Gowin FPGA Products Configuration File Size52
Safety Precautions53
Boundary Scan55
Figure 8-1 Boundary Scan Operation Schematic Diagram56
SPI Flash Selection57
Table 9-1 SPI Flash Operation Instruction57

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GOWIN GW1N Series Specifications

General

Device Series	GW1N
Category	FPGA
Core Voltage	1.2V
Embedded Memory	Yes
Technology Node	55nm
Package	QFN, BGA
Operating Temperature	-40°C to 100°C

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