GOWIN GW1NR-9 - User Manual

GW1NR series of FPGA products
Package & Pinout User Guide
UG119-1.7.1E, 12/14/2023

Summary

2 Overview

2.2 Package and Max. User I;O Information

Summarizes package types and their maximum user I/O capabilities.

3 View of Pin Distribution

3.1 View of GW1 NR-1 Pins Distribution

Illustrates the pinout configuration for GW1NR-1 series.

3.1.1 View of FN32 G Pins Distribution

Illustrates the pinout configuration for the GW1NR-1 FN32G package.

4 Package Diagrams

4.1 QN88;QN88 P Package Outline (10 mm x 10 mm)

Presents dimensional drawings for QN88 and QN88P package outlines.

4.2 QN32 X Package Outline (5 mm x 5 mm)

Presents dimensional drawings for QN32X package outline.

4.3 QN48 X Package Outline (7 mm x 7 mm)

Presents dimensional drawings for QN48X package outline.

4.4 LQ100 G Package Outline (14 mm x 14 mm)

Presents dimensional drawings for LQ100G package outline.

4.5 LQ144;LQ144 P Package Outline (20 mm x 20 mm)

Presents dimensional drawings for LQ144/LQ144P package outlines.

4.6 EQ144 G Package Outline (20 mm x 20 mm)

Presents dimensional drawings for EQ144G package outline.

4.7 MG49 P;MG49 PG;MG49 G Package Outline (3.8 mm x 3.8 mm)

Presents dimensional drawings for MG49P/MG49PG/MG49G packages.

4.8 MG81 P Package Outline (4.5 mm x 4.5 mm)

Presents dimensional drawings for MG81P package outline.

4.9 MG100 P;MG100 PF;MG100 PA;MG100 PT MG100 PS Package Outline (5 mm x 5 mm)

Presents dimensional drawings for MG100P/PF/PA/PT/PS packages.

4.10 FN32 G Package Outline (4 mm x 4 mm)

Presents dimensional drawings for FN32G package outline.

GOWIN GW1NR-9 Specifications

General

Series	LittleBee
Device	GW1NR-9
Logic Cells/Elements	8640
Embedded Memory	Yes
Operating Voltage	1.2 V
Mounting Type	Surface Mount
Process Technology	55nm
Category	FPGA
RAM Size	414 kbit