LCO-IV----------------------------------------------------------------
Table 8 Timer
Range
(Prescaler
clock: 1,024 Hz)
Specified
* Time
(ms)
Frequency (Hz)
Value
0
1,000
1
1 937.5
1.07
2 875
1.04
3 812.5 1.23
4
750
1.33
5
687.5 1.45
6
625
1.60
7 562.5
1.78
*
Time
is
based on crystal
oscillation
for
timer
32.768
kHz.
•
INTERRUPT
There
are
interrupt caused by the timer/counter or the
in-
puts. Each interrupt cause has the interrupt request F
/F
and
the request
is
latched into this flip-flop when it
is
generated.
If
an interrupt can be accepted, the interrupt
is
generated.
INT,
IFO,IF1
Set
has
priority
over Reset.
o
F/F
(Delayed
by
One
Instruction
Cycle)
Specified
* Time
(ms)
Frequency
Value
8
500 2
9 437.5 2.29
10 375
2.67
11
312.5 3.20
12
250 4
13
187.5
5.33
14
125
8
15
62.5
16
It
is
controlled by Interrupt Enable
F/F
(lIE F/F) whether
an
interrupt can be accepted
or
not.
Figure
23
shows the interrupt block diagram and Figure 24
shows the interrupt timing chart.
To
Status
F/F
lIE
...
---+---t-----I/RI
(Interrupt
Mask Signal)
INT
~--------~-------------4--I/RT
Figure 23 Interrupt Circuit Block Diagram
The status
is
unchanged. (The interrupt is different from
general
CAL in regard
to
this matter.)
Stacking
of
registers
is
performed by the program. Returning
from the interrupt routine
is
performed in the same way
as
that
from normal subroutine_ But it
is
convenient
to
use
RTNI (Re-
turn Interrupt) which sets the I/E simultaneously with RTN.
An
interrupt
is
generated irrespectively
of
the condition
of
stack registers,
so
enough stack registers
are
needed.
TF,
IFO,
or
IFl
is
flip-flop where the set has priority over
the reset. It
is
not reset when the reset instruction
is
issued
simultaneously with
OVF
of
the timer/counter
or
the leading
edge
of
the input, though the interrupt request
is
generated
and latched into I/RI
or
I/RT.
The interrupt processing caused by the interrupt generation
is
basically the subroutine jump and the jumping location
in
memory
is
fIXed
as:
200
Interrupt
of
the timer/counter
Bank
0 0 page
3F
address (OO-3F)
Interrupt
of
the inputs
Bank
0 1 page
3F
address
(Ol-3F)
In addition,
The saving operation
of
PC
~
STl
~
ST2
~
ST3
~
ST4.
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