Hitachi AP1 - Page 237

----------------------------------------------------------------HMCS404C
1000.0
IEr------------------- __ -1~
Sequence Conlrol
· Pu'" PC CA ST
1001.0
1001.2
1003.0
· Reset Ilf
· Jump to Vector
Address
Priority Control
PLA
Fig.6 Interrupt Circuit Block Diagram
Table 1. Vector Addresses and Interrupt Priority
Reset, Interrupt
Priority
Vector
addresses
RESET
-
$0000
INTo
,
$0002
INT,
2 $0004
TIMER-A 3 $0006
TIMER-B 4 $0008
SERIAL 5 $OOOC
Table 2. Conditions of Interrupt Service
~
Interrupt source
INTo
INT,
TIMER-A
TlMER-B
control bits
I/E
,
,
,
,
IFO·IMO
1
0
0
0
IF1 ·IM1
*
,
0
0
IFTA
·IMTA
*
*
1
0
IHS ·IMTB
* * *
1
IFS ·IMS
* * * *
235
SERIAL
1
0
0
0
0
1
• Don't care