Hitachi AP1 - Page 360

HMCS404CL------------------------------------------------------------------------
Without pull-up MOS (NMOS open drain)
With
pull-up MOS (B) Applied pins
or
CMOS (A or C)
SCK
,..,
SCK
HLT
I/O
Vee
HLT
V'~
common
H L T +mode select
o-l1 HL T+",od. ~I~
SCK
pins
0-
~;n .. m"SCK
internal SCK
en
~::T
c:
Vee
.0.
"E
Output
~~::T
co
SO
"0
pins
c:
co
en
Input
INTo,
pins
INT"
o-e-input
o--e-input
SI
data
data
HLT
HLT
(Note) I n the stop mode, H L T signal is "0", H L T signal is "1" and I/O pins are in high impedance state.
Table 18 Data Input from Input/Output Common Pins
I/O pin circuit type
Possibi lity
Available pin condition
of Input
for input
CMOS
No
-
Standard
Without pull-up
pins
MOS
(NMOS open drain)
Yes
"1"
With pull-up MOS
Yes
"1"
Without pull-down
High MOS
Yes
"0"
voltage
(PMOS open drain)
pins
With
pull-down
MOS
Yes
"0"
358