HP 214B - Delay Error; Width Error; EXTERNAL INPUT CIRCUITS

Service
DELAY ERROR
DELAY
U6.
RATE
-5 .2 V - .... ------il>---------'
Figure 8- 3- 7. Functional diagram for error detect
Width Error
Width timing error is indicated when the pulse width is greater than or equal to the pulse period .
An erroneous width setting is detected by Ul0a which compares the width 'start' signal from U2 / pin 2
with the width 'duty cycle' signal from TP5. Width an incorrect width setting, the width ra mp capacitors
are still being charged when the width 'start' sig nal 2rrives from the delay Schmitt trigger. The TP5
signal is therefore still low, which in turn puts a high on the D·input of UlOa. This high is clocked through
by the width 'start' signal from U2 / pin 2, and the timing error LED DSI is illuminated. A simplified
diagram of the timing error logic circuit for detecting incompatible width settings is given in Figure 8- 3-8.
WIDTH
WIDTH ERROR
FROM
U2.
WIDTH START
U10.
Figure 8- 3- 8. Functional diagram for error detect in width settings
EXTERNAL INPUT CIRCUITS
-S.2V - .... ---- .... ------'
Transistors 02 / 03 and constant current so urces 04 / 05 form a differential amplifier with a current
mode at the CR5 / CR6 anode junction. By switch ing current on and off this node, Schmitt trigger
08 / 09 can be switched via base·stage 06 . FET 01b is used to set the offset level which is adjustable
via R
15 (T R IGG E R LEVE L), and 01 a ensures a high input impedance for the external trigger and
gate signals.
The external sig nal applied to the 01 a gate is clamped to +5.7 V and - 5.9 V.
8-22
Model 214B
Scans by ArtekMedia => 2009