IBM System/360

2803 TAPE CONTROL (Continued)
Timings in Microseconds unless
Milliseconds (ms) Indicated
800 BPI Dela):'. Counter usec ~'~
Model l Model 2
Model 3
WDD 27-30
71).42 .1
55.8- 60.2
27 .8- 30. l
18.7- 21.1
Reset Write Reg
WDD 35-42
71).42. 1
72.4- 76.8 36.0- 38.4
24.2- 26.7
Shift CRCR
WDD 47-78
71).42. 1
97 .2-101.8
48.4- 50.9
32.5- 34.9
C RC to Write Bus
WDD 47-76 ?iJ.42. l 97.2-101.8 48.4- 50.9
32.5- 34.9
Write CRC P Bit
Set Wr Pulse Control
71).31. l
97.2-101.8 48.4- 50.9
32.5- 34.9
WDD 47 or 95 196.6-201.6 97.8-100.8
65.8- 68.3
WDD 51-58 Tl.31.I 105.5-110. l
52.5- 55.0
35.3- 37 .0
Write Pulse CRC
End WDD and Writ-e
Check Char
?'J.31. l 109.7-114.2 54.5- 57 .1
36.7- 37.8
WDD 53 or 117 242.1-247.4 120.5-123.7
WDD 403
7).31. l *198. 7-200. 5
ROD 17-30
7).41. l
35.3- 66,5 17 .6- 33.3
11 .5- 22.2
Lost Charocter
RDD 27-30
7').42. 1
55.8- 59.9 27 .8- 30.1
18.7- 21. 1
Shift CRCR and EPR
RDD 36
7J.21.1 74.5- 78.9
37 .0- 39.4
24.9- 27.4
Set l st Check Char
RDD 95
.7J.42. l
196.6-201.6 97.8-100.8
65. 8- 68.3
Set 2nd Check Chor
RDD 83-86 7'.l.42.1
171.8-176.6 85.4- 88.3
57.2- 60.0
Shift CRC and EPR
RDD 95-98 70.42. l 196.6-201.6 97. 8-100. 8
6.J, 8- 68.3
EPR to Read Reg
RDD 99-102 70.42. l 204. 9-209. 9 101.9-105.0
68,6- 71. l
Reset EPR
ROD 103-106 Set 1 in EPR
7'.),42.1
213.2-218.2 106.0-109.1
71 ,3- 73,9
RDDlll-142 70.42.1 229.7-234.9 114.3-117,4 76.9- 79.4
Gate to Find Track
RDD 169-172 Sample LRCR
70.42. l 349. 8-355. 5 174.0-177.8
117. 1-118,5
RDD 171 Disconnect 70.51.1 353. 9-359. 7
176.1-179,8 118.5-119.7
ROD 91-94
Reset Read Reg
70.42.1 188.3-193.3 93.7- 96,6 60.3- 65.5
FSD 511 Disconnect 70.51 .1
1.05-1.06 ms
526.3-533.4
354.1-356.6
(Rd Op)
556 BPI Deloy Counter usec
WDD 47 or 95 70.~1. J
138.6-146,5 70,0- 73.5 46.9- 50.0
Set Wr Pulse Control 280.2-290.0 141,5-145.5 94.9- 98.0
End WDD and Write
70.31.1
156.3-164.5 78,9- 82.5
52.0- 56,0
Check Char-WDD 53
ROD 17-30 70.41 .1
51.0- 96.0 25.2- 47.6
16.9- 32.2
Lost Character
RDD 36
70.21.1
'106.2-113.6 53.6- 57.0 35.9- 39.0
Set l st Check Char
RDD 95
70.42.1
280.2-294.0
141.5-145.5
94. 9- 98.0
Set 2nd Check Char
ROD 169-172 70.42.1
*498.5-511.3 251 .8-256.5
168.0-172.0
Sample LRCR
ROD 171 70.51. 1
504.4-517.3 254,7-259.5 170.8-173.0
Disconnect
FSD 511 70.51 .J
1 .5-1 .53 ms
761.3-769.5
510.4-513.0
Disconnect (Rd Op)
200 BPI Dela)'.'. Counter usec
WDD 47 or 95 70.31.1
390. 5-407. 6 195.5-204.0 139.1-136.7
Set Wr Pulse Control
789.4-806.1
395.2-404.2 263.1-269.7
End WDD & Write 70.31.1
440. 4-457. 0
220.4-229.0 143.5-154.0
Check Chor - WDD 53
ROD 17-30 70.41 .1
141. 0-267. 0 70.7-137.0 47.0- 89.0
Lost Character
RDD 36 70.21. l
299.1-315.9
149.7-158.5 99,7-106,3
Set 1st Check Chor
RDD 95 70.42.1
789.4-807.0 ms
395 ,2-404.5 263.1-269.7
Set 2nd Check Char
ROD 169-172
70.42. l 1.4- 1 .42 ms
703.0-713.1 468.1-473.6
Sample LRCR
ROD 171
70.51.1 1.42- 1.44ms
711 .3-721.6
473. 6-479. 1
Disconnect
FSD 51 J
70.s1. r
4.24- 4.27 ms
2.12- 2.14 ms 1.41- 1.47 ms
Disconnect (Rd Op)
*Measure From WDD 117
S/360
Note: Delay co1;nter timings me measured with reference to the rise of
87
"+Microsecond Control" (60. 71.1).