Icom IC-7200

3 - 5
3-6 PORT ALLOCATIONS
• CPU (LOGIC UNIT: IC1)
PIN
No.
LINE
NAME
SIGNAL DESCRIPTION I\O ACTIVE
PULL-UP/
PULL-DOWN
1 DTFS DSP data frame (TX) O H – –
2 DCK DSP data clock O – – –
3 DRXS DSP data (RX) I – –
47 kΩ pull-
down
4 DTXS DSP data (TX) O – – –
5 DRESL DSP reset O L DSP reset=L
47 kΩ pull-
down
6 BYTE
External bass width setting
16 bit=H, 8 bit=L, single chip=VSS
O– – –
8 UPWS USB HUB power supply control O H USB turn ON=H
47 kΩ pull-
down
9 UMDS USB modulation input line control O H USB side=H, ACC side=L –
10 RESET Reset signal I L Reset 10 kΩ pull-up
16 EBUSY CI-V buss busy input I – edge interrrupt 100 kΩ pull-up
17 VBUS USB VBUS detect I H USB connect –
18 PWRK [PWR] key input I L L=ON 47 kΩ pull-up
19 BL2S LCD back light DIMMER control O H H: dark, L: bright 47 kΩ pull-up
20 BL1S LCD back light DIMMER control O H H: dark, L: bright 47 kΩ pull-up
21 USCK USB HUB control (Clock) O L data latch –
22 USDA USB HUB control (Data) O L data=1 –
23 RSB [M-CH/RIT] dial phase B input (10 pulse/20 click) I H pulse (DOWN: phase B gain) 47 kΩ pull-up
24 RSA [M-CH/RIT] dial phase A input (10 pulse/20 click) I H pulse (UP: phase A gain) 47 kΩ pull-up
25 MSA [DIAL] phase A input I – –
220 kΩ pull-
down
26 MSB [DIAL] phase B input I – H=down, L=up
220 kΩ pull-
down
27 TKEY Key signal for optional tuner I L – 47 kΩ pull-up
28 TSTA START signal for optional tuner O L – 10 kΩ pull-up
33 ETXD CI-V output (CLONE output) O H – 100 kΩ pull-up
34 ERXD CI-V input (CLONE input) I H – 100 kΩ pull-up
35 ESCK EEPROM Clock O L data latch (output) 22 kΩ pull-up
36 ESDA EEPROM Data IO L – 10 kΩ pull-up
37 RITD RIT LED O H turn on
47 kΩ pull-
down
38 TCON Tuner connect detect I H tunet connect 1 MΩ pull-down
40 DISEN LCD OFF O L L=turn on, H=turn off
100 kΩ pull-
down
41 DISST LCD driver serial chip enable O H data transmitting –
42 DISCK LCD driver serial clock O – data latch –
43 DISDA LCD driver serial data O H data=1 –
45–
52
KR7–
KR0
Key matrix input return I H H: key pull down
47 kΩ pull-
down
53 PWRS Power control O H power ON=H
47 kΩ pull-
down
54 RXS RX control O H RX=H
47 kΩ pull-
down
55 TXS TX control O H TX=H
47 kΩ pull-
down
56 SNDS External SEND control (via ACC socket) O L except ACC SEND TX=L 47 kΩ pull-up
57 BSTB Strobe for shift register of MAIN O H data renewal –
58 ASTB1 Strobe (1/2) for M62352GP (D/A) O H data renewal –
59 MCK
BAND relay system clock (shift register for RF,
shift register for 1st LO filter)
O – data latch –
61 MDAT
BAND relay system data (shift register for RF, shift
register for 1LO filter)
O H data=1 –
63 ASTB2 Strobe (2/2) for M62352GP(D/A) O H data renewal –
64 1CN0 AD9951 (DDS for 1st LO) IO UPDATE O – DDS output renewal –
65 3DST AD9833 (DDS for 3rd LO) storobe O L data transmitting –
66 1DST AD9951 (DDS for 1st LO) strobe O L data transmitting –
67 MRESL System reset (shift register for MAIN) O L main system resetting =L
47 kΩ pull-
down
68 PRESL
DDS system reset (shift register for 1st LO filter,
AD9951)
O L DDS system resetting=L
47 kΩ pull-
down