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Specifies input voltage, output voltage/current, power, efficiency, and resonant frequency.
Details the design process for the power stage components.
Calculates maximum input power and minimum input voltage based on hold-up time.
Discusses selecting the resonant factor 'm' for efficiency and ZVS.
Explains voltage gain calculation for efficiency and worst-case scenarios.
Calculates the transformer turns ratio based on voltage drops and gain.
Calculates the effective load resistance for the resonant network.
Defines normalized frequency and load factor for resonant network analysis.
Details the design of the resonant choke, including voltage and current calculations.
Covers transformer design, including turns ratio and core selection.
Discusses voltage stress and RMS current for the SR MOSFET.
Details the design of control parameters and protection mechanisms.
Explains how the switching frequency is set using the FREQ pin and external resistor.
Discusses setting minimum and maximum switching frequencies and related components.
Details setting the frequency for Over-Current Protection (OCP).
Explains dead time selection to ensure Zero Voltage Switching (ZVS).
Covers softstart, OLP blanking, and auto-restart time calculations.
Describes the function of the LOAD pin for overload detection and protection.
Discusses the current sense circuit and its role in protection.
Explains setting the VINS pin for mains input voltage sensing and hysteresis.
Details latch-off enable and burst mode selection via the EnA pin.
Introduces Synchronous Rectification (SR) control for high efficiency.
Explains SR MOSFET turning-off conditions and maximum on-time setting.
Details the SR turn-on delay function and its setting via the Vres pin.
Explains setting advanced turn-off delay for SR MOSFETs using the Delay pin.
Summarizes the SR control scheme and typical waveforms.
Lists SR protection conditions and how the IC handles them.
Refers to schematics for the final power stage and control circuit.
Details star connection methods for the power stage components and filtering.
Explains star connection techniques for various grounds related to the IC.
This document outlines the design guide for an LLC resonant converter utilizing the ICE2HS01G, a second-generation half-bridge LLC controller specifically engineered for high-efficiency applications, particularly those incorporating synchronous rectification (SR) on the secondary side. The ICE2HS01G stands out due to its innovative driving techniques, which enable synchronous rectification in half-bridge LLC converters operating with secondary switching currents under both Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM) conditions. A significant advantage of this controller is that it eliminates the need for a separate SR controller IC on the secondary side, simplifying the overall design and potentially reducing component count and cost. For optimal performance, it is recommended to pair the ICE2HS01G with a half-bridge driver IC on the primary side.
The design procedure for an LLC resonant converter with the ICE2HS01G is meticulously detailed, providing a comprehensive framework for engineers. This guide includes an example of a 300W converter operating with a 400VDC input, offering practical insights into the application of the controller. The detailed calculation of component values surrounding the IC is also provided, ensuring that designers have the necessary information to accurately select and size external components for their specific applications. Furthermore, the document offers valuable tips on PCB layout, which are crucial for achieving the best possible performance and minimizing noise and interference in high-frequency switching power supplies.
A core function of the ICE2HS01G is its advanced synchronous rectification (SR) control. SR is a critical factor in achieving high efficiency in half-bridge LLC resonant converters, and the ICE2HS01G's SR control scheme is a major benefit. The controller's SR driving techniques allow for efficient operation across various load conditions, including both CCM and DCM. The SR control mechanism is designed to ensure safe switching and optimize the conduction time of the SR MOSFETs, thereby reducing conduction losses and improving overall efficiency. The control scheme comprises four main parts: on-time control, turn-on delay, advanced turn-off delay, and various protections.
The on-time control of the SR MOSFETs is determined by two conditions: the turning-off of the primary gate and an "off" instruction from the SR on-time block. The maximum on-time (Ton_max) is a preset value, and the SR MOSFET is triggered off by whichever instruction comes first. This flexibility allows for fine-tuning of the SR on-time to achieve higher efficiency, as a longer SR MOSFET conduction time reduces body diode conduction time and associated losses. The Ton_max can be adjusted based on the resonant frequency and primary side dead time, ensuring safe switching while maximizing efficiency. The CL pin, or current level pin, plays a crucial role in adjusting the SR on-time based on load conditions. During heavy load and low input voltage, the CL pin voltage is clamped, and the SR on-time is determined solely by the RSRD resistor. However, under light load conditions, the CL pin voltage is reduced, drawing extra current from the SRD pin and consequently reducing the actual SR on-time. This adaptive control helps maintain high efficiency across a wide load range.
The turn-on delay feature, controlled by the Vres pin, is implemented to ensure safe switching, especially when the input voltage is higher than the resonant voltage and the LLC converter secondary switches are operating in CCM. In such conditions, a certain recovery time for the SR MOSFET body diode is required. The turn-on delay ensures that the other SR MOSFET is turned on only after this recovery phase, preventing shoot-through and ensuring reliable operation. The input voltage at the VINS pin is sensed and compared to a reference voltage set by the Vres pin. If the input voltage exceeds this reference, a turn-on delay is added, turning on the SR MOSFETs after a specified delay. This delay is crucial for compensating for propagation delays in the gate signals and ensuring proper timing.
The advanced turn-off delay, controlled by the Delay pin, further refines the SR control. This delay time (Toff_delay) is determined by the propagation delay and transition time within the converter system. By setting an appropriate Toff_delay, designers can ensure that the SR MOSFETs are turned off at the optimal moment, preventing negative current flow and further enhancing efficiency. The control scheme is designed to be robust, with the SR MOSFET being turned off by the first signal received, either the turning-off of the primary gate or the falling edge of the maximum on-time signal. This ensures that the SR MOSFETs are always switched off safely and efficiently, regardless of the operating frequency.
For maintenance and reliability, the ICE2HS01G incorporates several protection features for the SR control. These protections ensure that the SR gate drive is disabled under abnormal conditions, preventing damage and ensuring stable operation. For instance, during softstart, the SR is initially disabled and enabled only after the softstart pin voltage reaches a certain threshold for a specified duration. The controller also disables SR immediately if the LOAD pin voltage falls below a critical level, indicating an overload or open-loop fault. Similarly, during over-current protection phases, SR is disabled if the softstart pin voltage or CS pin voltage exceeds predefined limits. These built-in protections automatically disable SR when faults are detected and re-enable it with a softstart sequence once the conditions return to normal, ensuring the longevity and reliability of the converter.
The EnA pin provides additional functionality, including a latch-off enable function and burst mode selection. By connecting a resistor from the EnA pin to ground, a specific voltage level can be set. If this voltage falls below a certain level during operation, the IC is latched off. This feature can be utilized for over-temperature protection (OTP) if an external resistor with a negative temperature coefficient is used. The burst mode function, which can be enabled or disabled during configuration before softstart, allows for further optimization of efficiency under light load conditions. If burst mode is enabled, the gate drives are disabled when the LOAD pin voltage falls below a certain threshold, reducing switching losses. Conversely, if burst mode is not selected, the gate drives remain active, providing continuous operation.
The VINS pin setting is crucial for specifying the minimum operation input voltage for the LLC resonant converter. A resistor divider network, along with an internal current source, creates an adjustable hysteresis between the turn-on and turn-off input voltages. This ensures stable operation during brown-out conditions, preventing erratic switching. The design guide provides calculations for selecting the appropriate resistor values to achieve desired turn-on and turn-off bus voltages, ensuring reliable operation across varying input voltage ranges.
Finally, the document emphasizes the importance of proper PCB layout to avoid crosstalk between power and signal paths and to maintain a "clean" IC GND pin. Star connection for both the power stage and the IC is recommended, with specific guidelines for connecting various grounds and placing filtering capacitors. These layout tips are essential for minimizing noise, improving signal integrity, and achieving optimal performance of the LLC resonant converter with the ICE2HS01G. The detailed design procedure, component calculations, and layout recommendations make this guide an invaluable resource for engineers developing high-efficiency LLC converters.
| Category | Controller |
|---|---|
| Topology | Flyback |
| Overcurrent Protection | Yes |
| Overload Protection | Yes |
| Operating Temperature Range | -40°C to 125°C |
| Input Voltage Range | 85 V to 265 V AC |
| Protection Features | Overcurrent Protection (OCP), Overload Protection (OLP), Overvoltage Protection (OVP), Undervoltage Lockout (UVLO) |