UM_INAP375R Revision 1.2_A1 Inova Semiconductors Confidential Page 11 of 37
User Manual
5 AX_SPIS_CS2#
APIX2 SPI slave and GPIO interface. Monitor only if μC access is
enabled (default). To disable μC access to this signals switch on DIP
switch S4.1
7 AX_SPIS_SCK
9 AX_SPIS_SDI
11 AX_SPIS_SDO
13 AX_GPIO_1
15 AX_GPIO_0
SV3 μC interface for extension boards
Pin Signal Description
1 UC_P1_25
μC ports for extension boards
2 UC_P2_13
3 UC_P1_24
4 UC_P2_12
5 UC_P1_23
6 UC_P0_24
7 UC_P1_22
8 UC_P0_23
9 UC_P1_21
10 UC_P0_22
11 DIGITAL_RESET_N Digital signal reset
12 GND Signal ground
13 I2C_0_SCL
I2C bus 0
15 I2C_0_SDA
14 I2C_1_SCL
I2C bus 1
16 I2C_1_SDA
Table 3-4: Extension board μC interface
SV2 APIX2 I2C, SPI slave and GPIO interface
Pin Signal Description
Table 3-3: APIX2 I2C, SPI slave and GPIO interface
To Next Page
Loading...
Need help?
General