MEMORY MANAGEMENT AND VIRTUAL ADDRESSING
Thus,
in
most cases, virtual-to-physical address translation
is
actually performed
in
two
separate steps.
First, when a program loads a
new
value into a segment register, the processor immediately performs
a mapping operation; the physical base address of the selected segment (as
well
as
certain additional
information)
is
automatically loaded into the hidden portion of the register. The internal cache registers
(virtual address translation hardware) are therefore dynamically shared among the 16K different
segments potentially addressable within the user's virtual address space. No software overhead (either
system or application)
is
required to perform this operation.
Subsequently,
as
the program utilizes a short pointer to reference a location within a segment, the
processor generates a 24-bit physical address simply by adding the specified offset value to the previ-
ously cached segment base address.
By
encouraging the use of short pointers
in
this way, rather than
requiring a full 32-bit virtual address for every memory reference, the 80286 provides a very efficient
on-chip mechanism for address translation, with minimum overhead for references to memory-based
tables or the need for external address-translation devices.
6.6.2
System Address Registers
The Global Descriptor Table Register (GDTR)
is
a dedicated 40-bit
(5
byte) register used to record
the base and size of a system's global descriptor table (GDT). Thus,
two
of these bytes define the size
of the GDT, and three bytes define its base address.
In figure
6-8,
the contents of the GDTR are referred to
as
a "hidden descriptor." The term "descrip-
tor" here emphasizes the analogy with the segment descriptors ordinarily found
in
descriptor tables.
Just
as
these descriptors specify the base and size (limit) of ordinary segments, the GDTR register
specifies these same parameters for that segment of memory serving
as
the system GDT. The limit
prevents accesses to descriptors
in
the GDT from accessing beyond the end of the GDT and thus
provides address space isolation at the system level
as
well
as
at the task level. .
The register contents are "hidden" only
in
the sense that they are not accessible by means of ordinary
instructions. Instead, the dedicated protected instructions LGDT and SGDT are reserved for loading
and storing, respectively, the contents of the GDTR at Protected Mode initialization (refer to section
10.2
for
details). Subsequent alteration of the GDT base and size values
is
not recommended but
is
a
system option at the most privileged level of software (see section
7.3
for a discussion of privilege
levels).
The Local Descriptor Table Register (LDTR)
is
a dedicated 40-bit register that contains, at any given
moment, the base and size of the local descriptor table (LDT) associated with the currently executing
task. Unlike GDTR, the LDTR register contains both a "visible" and a "hidden" component. Only the
visible component
is
accessible, while the hidden component remains truly inaccessible even
to
dedicated
instructions.
The visible component of the LDTR
is
a 16-bit "selector" field. The format of these
16
bits corresponds
exactly to that of a segment selector
in
a virtual address pointer. Thus, it contains a 13-bit
INDEX
field, a I-bit
TI
field, and a 2-bit RPL field. The
TI
"table indicator" bit must be zero, indicating a
reference to the
(JUT
(i.e., to global address space). The INDEX field
CUlls.oqiieiitly
pro'video
an index
to a particular entry within the GDT. This entry,
in
turn, must be an LDT descriptor (or descriptor
table descriptor), as defined in the previous section. In this
way,
the visible "selector" field of the
LDTR,
by
selecting an LDT descriptor, uniquely designates a particular LDT
in
the system.
The dedicated, protected instructions LLDT and SLDT are reserved for loading and storing, respec-
tively, the visible selector component of the LDTR register (refer to section 10.2 for details). Whenever
a
new
value
is
loaded into the visible "selector" portion of LDTR, an LDT descriptor
will
have been
uniquely chosen (assuming, of course, that the "selector" value
is
valid). In this case, the 80286
6-12
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