Intel 80386

MEMORY INTERFACING
tDF: read (MRDC# rise) to Data Float
(2 x CLK2 period) - Pal RegOut Max
+ PAL RegOut Min
+ xcvr. Enable Min
(2 x 31.25)
- 12
+
0
+
3
= 47.5 nanoseconds
tDW:
Data setup before write (MWTC# rise)
(3 x CLK2 period) - PAL RegOut Max
- xcvr. Enable Max
+ PAL RegOut Min
(3 x 31.25)
- 12
-11
+
0
= 70.75 nanoseconds
tWD:
Data hold after write (MWTC# rise)
(1 x CLK2 period)
- PAL RegOut Max
+ PAL RegOut Min
+ xcvr. Disable Min
(1 x 31.25)
- 12
+
0
+
2
= 21.25 nanoseconds
6.2.8 16-Bit Interface
The use of a 16-bit data bus can be advantageous for some systems. Memory implemented
as 16-bits wide rather than 32-bits wide reduces chip count. I/O addresses located at word
boundaries rather than doubleword boundaries can be software compatible with some systems
that use 16-bit microprocessors.
For example, if BS16# is asserted for EPROM accesses, only two byte-wide EPROMs are
needed. Overall performance is reduced because 32-bit data accesses and all code prefetches
from the EPROMs are slower (requiring two bus cycles instead of one). However, this
reduction is acceptable in certain applications. A system that uses EPROMs only for power-
on initialization and runs programs entirely from SRAM or DRAM has only a power-on
time increase over the 32-bit EPROM system; its main programs run at the same speed as
the 32-bit system.
The 80386 BS16# input directs the 80386 to perform data transfers on only the lower
16 bits of the data bus. In systems in which 16-bit memories are used, the address decoder
logic must generate the BS16# signal for 16-bit accesses. Since NA# cannot be asserted
during a bus cycle in which BS16# is asserted (because the current address may be needed
for additional cycles), the decoder logic should also guarantee that the NA# signal is not
generated. When the 80386 samples BS16# active and NA# inactive, it automatically
performs any extra bus cycles necessary to complete a transfer on a 16-bit bus. The 80386
response is determined by the size and alignment of the data to be transferred, as described
in Chapter 3.
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