SYSTEM OVERVIEW
1.3 INTEGRATED SYSTEM PERIPHERAL
A DMA (Direct Memory Access) controller performs DMA transfers between main memory
and an
I/0
device, typically a hard disk, floppy disk, or communications channel. In a DMA
transfer, a large block of data can be copied from one place to another without the interven-
tion of the cpu.
The 82380 Integrated System Peripheral
is
a multi-function 80386 companion chip.
It
integrates a 32-bit DMA Controller with other necessary processor support functions needed
in
an 80386 environment. The 82380
is
optimized for use with the 80386 microprocessor.
It
enhances the overall 80386 system performance by providing high data throughput as well
as efficient bus operation.
The
32-bit
DMA
Controller provides eight independently
programmable channels that can transfer data at the full bandwidth of the 80386 bus. Other
features of the 82380 are listed as follows.
• High performance 32-bit
DMA
Controller
- 8 independently programmable channels
-
32
megabytes per second data transfer rate at
16
MHz
-40
megabytes per second data transfer rate at
20
MHz
-Capable
of transferring data between devices with different bus widths
- Automatic byte assembly/disassembly capability for non-align data transfers
- Buffer chaining capability for transferring data into non-contiguous memory buffers
• 20-Source Interrupt Controller
-
15
external,S internal interrupt requests
-82C59A
susperset
- Individually programmable interrupt vectors
• Four l6-bit programmable Interval Timers
- 82C54 compatible
• Programmable Wait State Generator
-0
to
15
wait states for memory and
I/0
access cycles
o DRAM Refresh Controller
Refresh request always has the highest priority among the DMA requests
• 80386 Shutdown Detect and Reset Control
- Software and hardware reset
• Optimized for use with the 80386 microprocessor
- Resides
on
local bus for maximum bus bandwidth
1-4
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