Intel 80386 - Page 265

DRAM PAL DESCRIPTIONS
PALl6R8 PAL DESIGN SPECIFICATIONS
PART NUMBER: 3-CLK DRAM STATE PAL
DRAM STATE PAL OF INTERLEAVED DRAM CONTROLLER FOR 80386 SYSTEMS
INTEL, SANTA CLARA, CALIFORNIA
CLK2 CLK A2 CSO CSI C52 C53 CS4 RFRQ GND
OE RASO ROWSEL MUXOE QO QI A2REG DRAMSELECT RASI VCC
/DRAMSELECT:= CSO * /DRAMSELECT
+ CSI * /DRAMSELECT
+ CS2 * /DRAMSELECT
+ /CS3 * /DRAMSELECT
+ /CS4 * /DRAMSELECT
+ /CLK * /DRAMSELECT
+ /MUXOE * ROWSEL * /QI * /QO * /CLK
/ROWSEL : = /ROWSEL * QO * CLK
+ /ROWSEL * /QI
+ ROWSEL * /QI * /QO * /CLK
+ ROWSEL * /QI * QO * /CLK * MUXOE * RFRQ
/QI:= ROWSEL * /QI * /QO * /CLK
+ ROWSEL * QO * CLK
+ /ROWSEL * /QO * CLK
+ ROWSEL * QI * /QO * CLK * /CSO * /CSI * /CS2 * CS3 * CS4
* /MUXOE * A2 * A2REG
+ ROWSEL * QI * /QO * CLK * /CSO * /CSI * /CS2 * CS3 * CS4
* /MUXOE * /A2 * /A2REG
+ ROWSEL * /QI * QO * /CLK * /MUXOE
+ ROWSEL * /QI * QO * /CLK * /RFRQ
/QO : = /ROWSEL * QI * QO * /CLK
+ /ROWSEL * /QO * QI * CLK
+ ROWSEL * /QI * /QO * /CLK
+ ROWSEL * QI * CLK * /CSO * /CSI * /CS2 * CS3 * CS4
* /MUXOE * A2 * A2REG
+ ROWSEL * QI * CLK * /CSO * /CSI * /CS2 * CS3 * CS4
* /MUXOE * /A2 * /A2REG
+ ROWSEL * /QI * QO * CLK * /CSO * /CSI * /CS2 * CS3 * CS4 * /MUXOE
+ ROWSEL * /QI * QO * CLK * DRAMSELECT * /MUXOE
+ ROWSEL * /QI * QO * /CLK * MUXOE * RFRQ
/RASO:= ROWSEL * /QI * /QO * /CLK * /A2REG
+ ROWSEL * /QI * /QO * /CLK * MUXOE
+ /ROWSEL * /A2REG
+ /ROWSEL * MUXOE
+ ROWSEL * QI * CLK * /A2 * /A2REG * /CSO * /CSI * /CS2 * CS3 * CS4
* /MUXOE
+ ROWSEL * /QI * QO * CLK * /A2 * /CSO * /CSI * /CS2 * CS3 * CS4
* /MUXOE
+ ROWSEL * /QI * QO * CLK * /A2 * DRAMSELECT * /MUXOE
/RASI : = ROWSEL * /QI * /QO * /CLK * A2REG
+ ROWSEL * /QI * /QO * /CLK * MUXOE
+ /ROWSEL * A2REG
+ /ROWSEL * MUXOE
+ ROWSEL * QI * CLK * A2 * A2REG * /CSO * /CSI * /CS2 * CS3 * CS4
* /MUXOE
+ ROW5EL * /QI * QO * CLK * A2 * /CSO * /CSI * /CS2 * CS3 * CS4
* /MUXOE
+ ROWSEL * /QI * QO * CLK * A2 * DRAMS ELECT * /MUXOE
/MUXOE : = /MUXOE * /QO
+ /MUXOE * CLK
+ /MUXOE * /ROWSEL * /QI
+ /RFRQ * ROWSEL * /QI * QO * /CLK
+ /MUXOE * /RFRQ * QI * QO * /CLK
/A2REG := /A2REG * /QO
+ /A2REG * QI * CLK
+ /A2REG * ROWSEL * QI
+ /A2REG * /ROWSEL * /QI
+ A2REG * /ROWSEL * QI * QO * /CLK
+ /A2 * ROWSEL * /QI * QO
Figure C-2. 3-CLK DRAM State PAL Equations
C-3