JRC JMR-9225-9X - Page 92

Chapter 2 System Configuration 2-34
Table 2.4.10 SLC I/O specifications 2
Label Name Pin
Signal
Name
I/O Specification Detail
J8101
IEC61162-2
Ch.1
1 TX10A OUT
IEC61162-2
A
By TB3, choose
full duplex mode
or
half duplex
mode.
By TB15,
Choose
Termination
enabled or
disabled.
See
Fig. 2.4.10 SLC
IEC61162-2
TXRX detail
2 TX10B OUT
IEC61162-2
B
3 TX10C -
IEC61162-2
C
4 RX10A IN
IEC61162-2
A
5 RX10B IN
IEC61162-2
B
6 RX10C -
IEC61162-2
C
J8102
IEC61162-2
Ch.0
1 TX9A OUT
IEC61162-2
A
By TB2, choose
full duplex mode
or
half duplex
mode.
By TB14,
Choose
Termination
enabled or
disabled.
See
Fig. 2.4.10 SLC
IEC61162-2
TXRX detail
2 TX9B OUT
IEC61162-2
B
3 TX9C -
IEC61162-2
C
4 RX9A IN
IEC61162-2
A
5 RX9B IN
IEC61162-2
B
6 RX9C -
IEC61162-2
C