JRC JMR-9225-9X - Page 94

Chapter 2 System Configuration 2-36
Table 2.4.11 SLC I/O specifications 3
Label
Name
Pin
Signal
Name
I/O
Specification
Detail
J8105
IEC61162-1
1/2
1 RX1A IN
IEC61162-1
A
See
Fig. 2.4.11 SLC
IEC61162-1 RX1 detail
2 RX1B IN
IEC61162-1
B
3 TX1A OUT
IEC61162-1
A
See
Fig. 2.4.12 SLC
IEC61162-1 TX1 detail
4 TX1B OUT
IEC61162-1
B
5 RX2A IN
IEC61162-1
A
See
Fig. 2.4.11 SLC
IEC61162-1 RX1 detail
6 RX2B IN
IEC61162-1
B
7 TX2A OUT
IEC61162-1
A
See
Fig. 2.4.12 SLC
IEC61162-1 TX1 detail
8 TX2B OUT
IEC61162-1
B
J8104
IEC61162-1
3/4
1 RX3A IN
IEC61162-1
A
See
Fig. 2.4.11 SLC
IEC61162-1 RX1 detail
2 RX3B IN
IEC61162-1
B
3 TX3A OUT
IEC61162-1
A
See
Fig. 2.4.12 SLC
IEC61162-1 TX1 detail
4 TX3B OUT
IEC61162-1
B
5 RX4A IN
IEC61162-1
A
See
Fig. 2.4.11 SLC
IEC61162-1 RX1 detail
6 RX4B IN
IEC61162-1
B
7 TX4A OUT
IEC61162-1
A
See
Fig. 2.4.12 SLC
IEC61162-1 TX1 detail
8 TX4B OUT
IEC61162-1
B