JRC JMR-9225-9X - Page 95

2-37 Chapter 2 System Configuration
Table 2.4.12 SLC I/O specifications 4
Label
Name
Pin
Signal
Name
I/O
Specification
Detail
J8103
IEC61162-1
5/6
1 RX5A IN
IEC61162-1
A
See
Fig. 2.4.11 SLC
IEC61162-1 RX1 detail
2 RX5B IN
IEC61162-1
B
3 TX5A OUT
IEC61162-1
A
See
Fig. 2.4.12 SLC
IEC61162-1 TX1 detail
4 TX5B OUT
IEC61162-1
B
5 RX6A IN
IEC61162-1
A
See
Fig. 2.4.11 SLC
IEC61162-1 RX1 detail
6 RX6B IN
IEC61162-1
B
7 TX6A OUT
IEC61162-1
A
See
Fig. 2.4.12 SLC
IEC61162-1 TX1 detail
8 TX6B OUT
IEC61162-1
B
J8106
IEC61162-1
7/8
1 RX7A IN
IEC61162-1
A
See
Fig. 2.4.11 SLC
IEC61162-1 RX1 detail
2 RX7B IN
IEC61162-1
B
3 TX7A OUT
IEC61162-1
A
See
Fig. 2.4.12 SLC
IEC61162-1 TX1 detail
4 TX7B OUT
IEC61162-1
B
5 RX8A IN
IEC61162-1
A
See
Fig. 2.4.11 SLC
IEC61162-1 RX1 detail
6 RX8B IN
IEC61162-1
B
7 TX8A OUT
IEC61162-1
A
See
Fig. 2.4.12 SLC
IEC61162-1 TX1 detail
8 TX8B OUT
IEC61162-1
B