Shenzhen Just Motion Control Electro-mechanics Co., Ltd 0755-26509689
PUL
DIR
ENA
PUL/DIR
t3
t4
t5>5μs
High level > 3.5V
Low level > 3.5V
High level > 3.5V
t2>6μs
Low level > 3.5V
t1>5μs
Remark:
a. t1: ENA must be ahead of DIR by at least 5μ s. Usually, ENA+ and
ENA- are NC (not connected).
b. t2: DIR must be ahead of PUL active edge by 6μ s to ensure correct
direction;
c. t3: Pulse width not less than 2.5μ s;
d. t4: Low level width not less than 2.5μ s.
6. DIP Switch Setting
6.1 Current Setting
The current setting is in the following table.