JVC AX-Z1010TN User Manual

AX-Z1010TN
Bi YM3414 (IC113): Octuple Oversampling (18-bit resolution) - Digital Filter
(1) Appearnace
SHL
(3) Pin Description
(2) Internal Block Diagram
Sol
Multiplier, Output
Overfiow
SDSY Accumulator, Buffer
Limiter
Bco Shifter
DLO
Temporary DRO
8CO
RAM
wco
Timing
SHL
Address
Control SHR
TD SyncS f xO rae
When operating with 1 D/A converter (TD="'L’): L-channel deglitcher signat (for quadruple mode)
When operating with 2 D/A converts (TD=’‘H’'): L/R-channel deglitcher signal (for octuple mode)
Crystal oscillates between XI-XO.
16.9344 Mhz (External clock can also be input directly.)
+5V power supply pin for crystal oscillator and deglitcher signal
Input data bit clock input pin
Input data L-channel input timing clock input pin
Data input pin
+5V power supply pin for digital signal system
When operating with 1 D/A converter (TD="'L'’): L/R-channel data output in (for quadruple mode)
When operating with 2 D/A converters (TD="'H’’}: L-channel data output pin (for octuple mode)
s
R-channel data output pin
Word clock for output data DLO and DRO
Output data bit clock
GND pin
1 DAC/2 DACs select pin. 1 DAC (for quadruple mode}=‘’L'', 2 DACs (for octuple mode}=""H”’
Day sync input jitter absorption sync signal
(Syncs=""H’": complete sync input, Synes="'L'’: SDSY inhibit)
1-28 (No. 20115)
R-channel deglitcher signal when operating with 1 DAC

JVC AX-Z1010TN Specifications

General

Brand	JVC
Model	AX-Z1010TN
Category	Amplifier
Language	English